📄 arp.v
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module arp(
clk,
rst,
/****the interfrace to mac sublayer****/
data_o,
full,
/****the interface with the arp request receiver****/
r_desmac_i,
r_desip_i,
r_rd,
/*********/
a_desip_i,
/*********/
soumac_i,
souip_i,
/*********/
send_arp,
send_rarp,
sending,
arp_ing,
rarp_ing,
arp_over,
rarp_over,
);
input clk;
input rst;
output [7:0] data_o;
reg[7:0] data_o;
input full;
/*******************for the arp request reply packet****************/
input[47:0] r_desmac_i;
input[31:0] r_desip_i;
output r_rd;
reg r_rd;
input[31:0] a_desip_i;//for the ARP request packet
input[47:0] soumac_i;
input[31:0] souip_i;
input send_arp;
input send_rarp;
output sending;
reg sending;
output arp_ing;
reg arp_ing;
output rarp_ing;
reg rarp_ing;
output arp_over;
reg arp_over;
output rarp_over;
reg rarp_over;
reg[4:0] counter;
reg[1:0] pos_counter;
reg flag;
reg[1:0] current;
reg[1:0] next;
parameter IDLE=0, ARP=1, RARP=2, POS=3;
always@(current or full or send_arp or send_rarp
or flag or arp_ing or counter or pos_counter)
begin
next=2'bxx;
case(current)
IDLE: begin
if(!full) begin
if(send_arp)
next=ARP;
else if(send_rarp)
next=RARP;
else
next=IDLE;
end
else
next=IDLE;
end
ARP: begin
if(counter==30&&flag)
next=IDLE;
else if(counter==30&&!flag)
next=POS;
else
next=ARP;
end
RARP: begin
if(counter==30&&flag)
next=IDLE;
else if(counter==30&&!flag)
next=POS;
else
next=RARP;
end
POS: begin
if(pos_counter==3&&!full) begin
if(arp_ing) next=ARP;
else next=RARP;
end
else next=POS;
end
default: next=IDLE;
endcase
end
always@(posedge clk or negedge rst)
begin
if(!rst) current<=IDLE;
else current<=next;
end
/**************the counter****************/
always@(posedge clk or negedge rst)
begin
if(!rst) counter<=5'b0000_0;
else begin
case(next)
ARP,
RARP: counter<=counter+1;
default:counter<=5'b0000_0;
endcase
end
end
/***************the pos_counter*************/
always@(posedge clk or negedge rst)
begin
if(!rst) pos_counter<=2'b00;
else begin
if(next==POS)
pos_counter<=pos_counter+1;
else
pos_counter<=2'b00;
end
end
/**************the flag*******************/
always@(posedge clk or negedge rst)
begin
if(!rst) flag<=1'b0;
else begin
case(next)
IDLE: flag<=1'b0;
POS: flag<=1'b1;
endcase
end
end
/***************the rd_en of the arp request reply ********
*****************to get the r_des_add and r_des_ip*********/
always@(posedge clk or negedge rst)
begin
if(!rst) r_rd<=1'b0;
else begin
if(next==RARP&&counter==0&&!flag)
r_rd<=1'b1;
else
r_rd<=1'b0;
end
end
/*******************the data_o and desadd_o*************/
always@(posedge clk or negedge rst)
begin
if(!rst) begin
data_o<=8'h00;
end
else begin
case(next)
ARP: begin
case(counter)
0: data_o<=8'h08;//
1: data_o<=8'h06;//frame type
2: data_o<=8'h00;
3: data_o<=8'h01;//hardware type
4: data_o<=8'h08;
5: data_o<=8'h00;//protocal type (IP)
6: data_o<=8'h06;//mac add length
7: data_o<=8'h04;//IP add length
8: data_o<=8'h00;
9: data_o<=8'h01;//operator 00_01: arp request
10:data_o<=soumac_i[47:40];
11:data_o<=soumac_i[39:32];
12:data_o<=soumac_i[31:24];
13:data_o<=soumac_i[23:16];
14:data_o<=soumac_i[15:8];
15:data_o<=soumac_i[7:0];
16:data_o<=souip_i[31:24];
17:data_o<=souip_i[23:16];
18:data_o<=souip_i[15:8];
19:data_o<=souip_i[7:0];
20,
21,
22,
23,
24,
25:data_o<=8'hff;
26:data_o<=a_desip_i[31:24];
27:data_o<=a_desip_i[23:16];
28:data_o<=a_desip_i[15:8];
29:data_o<=a_desip_i[7:0];
endcase
end
RARP: begin
case(counter)
0: data_o<=8'h08;//
1: data_o<=8'h06;//frame type
2: data_o<=8'h00;
3: data_o<=8'h01;//hardware type
4: data_o<=8'h08;
5: data_o<=8'h00;//protocal type (IP)
6: data_o<=8'h06;//mac add length
7: data_o<=8'h04;//IP add length
8: data_o<=8'h00;
9: data_o<=8'h02;//operator 00_02: arp request reply
10:data_o<=soumac_i[47:40];
11:data_o<=soumac_i[39:32];
12:data_o<=soumac_i[31:24];
13:data_o<=soumac_i[23:16];
14:data_o<=soumac_i[15:8];
15:data_o<=soumac_i[7:0];
16:data_o<=souip_i[31:24];
17:data_o<=souip_i[23:16];
18:data_o<=souip_i[15:8];
19:data_o<=souip_i[7:0];
20:data_o<=r_desmac_i[47:40];
21:data_o<=r_desmac_i[39:32];
22:data_o<=r_desmac_i[31:24];
23:data_o<=r_desmac_i[23:16];
24:data_o<=r_desmac_i[15:8];
25:data_o<=r_desmac_i[7:0];
26:data_o<=r_desip_i[31:24];
27:data_o<=r_desip_i[23:16];
28:data_o<=r_desip_i[15:8];
29:data_o<=r_desip_i[7:0];
endcase
end
endcase
end
end
/***********************the status info********************/
always@(posedge clk or negedge rst)
begin
if(!rst) begin
arp_ing<=1'b0;
rarp_ing<=1'b0;
sending<=1'b0;
end
else begin
case(next)
IDLE: begin
arp_ing<=1'b0;
rarp_ing<=1'b0;
sending<=1'b0;
end
ARP: begin
arp_ing<=1'b1;
rarp_ing<=1'b0;
sending<=1'b1;
end
RARP: begin
arp_ing<=1'b0;
rarp_ing<=1'b1;
sending<=1'b1;
end
POS: begin
sending<=1'b0;
end
endcase
end
end
/**********************the pulse info******************/
always@(posedge clk or negedge rst)
begin
if(!rst) begin
arp_over<=1'b0;
rarp_over<=1'b0;
end
else begin
if(next==ARP&&counter==29&&flag)
arp_over<=1'b1;
else
arp_over<=1'b0;
if(next==RARP&&counter==29&&flag)
rarp_over<=1'b1;
else
rarp_over<=1'b0;
end
end
endmodule
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