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📄 eeprom.map.rpt

📁 eeprom的Verilog HDL源代码
💻 RPT
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; sh8out_state.sh8out_end  ; 0                       ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit0 ; 1                       ; 1                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit1 ; 1                       ; 0                        ; 1                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit2 ; 1                       ; 0                        ; 0                        ; 1                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit3 ; 1                       ; 0                        ; 0                        ; 0                        ; 1                        ; 0                        ; 0                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit4 ; 1                       ; 0                        ; 0                        ; 0                        ; 0                        ; 1                        ; 0                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit5 ; 1                       ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 1                        ; 0                        ; 0                        ;
; sh8out_state.sh8out_bit7 ; 1                       ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 1                        ;
; sh8out_state.sh8out_bit6 ; 1                       ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 0                        ; 1                        ; 0                        ;
+--------------------------+-------------------------+--------------------------+--------------------------+--------------------------+--------------------------+--------------------------+--------------------------+--------------------------+--------------------------+


+-------------------------------------------------------------------------------------------+
; State Machine - |eeprom|stop_state                                                        ;
+-----------------------+---------------------+---------------------+-----------------------+
; Name                  ; stop_state.stop_end ; stop_state.stop_bit ; stop_state.stop_begin ;
+-----------------------+---------------------+---------------------+-----------------------+
; stop_state.stop_end   ; 0                   ; 0                   ; 0                     ;
; stop_state.stop_bit   ; 1                   ; 1                   ; 0                     ;
; stop_state.stop_begin ; 1                   ; 0                   ; 1                     ;
+-----------------------+---------------------+---------------------+-----------------------+


+------------------------------------------------------+
; General Register Statistics                          ;
+----------------------------------------------+-------+
; Statistic                                    ; Value ;
+----------------------------------------------+-------+
; Total registers                              ; 66    ;
; Number of registers using Synchronous Clear  ; 0     ;
; Number of registers using Synchronous Load   ; 0     ;
; Number of registers using Asynchronous Clear ; 0     ;
; Number of registers using Asynchronous Load  ; 0     ;
; Number of registers using Clock Enable       ; 33    ;
; Number of registers using Preset             ; 0     ;
+----------------------------------------------+-------+


+------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |eeprom ;
+----------------+-------------+-----------------------------------------+
; Parameter Name ; Value       ; Type                                    ;
+----------------+-------------+-----------------------------------------+
; idle           ; 00000000001 ; Binary                                  ;
; ready          ; 00000000010 ; Binary                                  ;
; write_start    ; 00000000100 ; Binary                                  ;
; ctrl_write     ; 00000001000 ; Binary                                  ;
; addr_write     ; 00000010000 ; Binary                                  ;
; data_write     ; 00000100000 ; Binary                                  ;
; read_start     ; 00001000000 ; Binary                                  ;
; ctrl_read      ; 00010000000 ; Binary                                  ;
; data_read      ; 00100000000 ; Binary                                  ;
; stop           ; 01000000000 ; Binary                                  ;
; ackn           ; 10000000000 ; Binary                                  ;
; sh8out_bit7    ; 000000001   ; Binary                                  ;
; sh8out_bit6    ; 000000010   ; Binary                                  ;
; sh8out_bit5    ; 000000100   ; Binary                                  ;
; sh8out_bit4    ; 000001000   ; Binary                                  ;
; sh8out_bit3    ; 000010000   ; Binary                                  ;
; sh8out_bit2    ; 000100000   ; Binary                                  ;
; sh8out_bit1    ; 001000000   ; Binary                                  ;
; sh8out_bit0    ; 010000000   ; Binary                                  ;
; sh8out_end     ; 100000000   ; Binary                                  ;
; sh8in_begin    ; 0000000001  ; Binary                                  ;
; sh8in_bit7     ; 0000000010  ; Binary                                  ;
; sh8in_bit6     ; 0000000100  ; Binary                                  ;
; sh8in_bit5     ; 0000001000  ; Binary                                  ;
; sh8in_bit4     ; 0000010000  ; Binary                                  ;
; sh8in_bit3     ; 0000100000  ; Binary                                  ;
; sh8in_bit2     ; 0001000000  ; Binary                                  ;
; sh8in_bit1     ; 0010000000  ; Binary                                  ;
; sh8in_bit0     ; 0100000000  ; Binary                                  ;
; sh8in_end      ; 1000000000  ; Binary                                  ;
; head_begin     ; 001         ; Binary                                  ;
; head_bit       ; 010         ; Binary                                  ;
; head_end       ; 100         ; Binary                                  ;
; stop_begin     ; 001         ; Binary                                  ;
; stop_bit       ; 010         ; Binary                                  ;
; stop_end       ; 100         ; Binary                                  ;
; yes            ; 1           ; Binary                                  ;
; no             ; 0           ; Binary                                  ;
+----------------+-------------+-----------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+--------------------------------+
; Analysis & Synthesis Equations ;
+--------------------------------+
The equations can be found in D:/eeprom/eeprom.map.eqn.


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 5.0 Build 168 06/22/2005 Service Pack 1 SJ Full Version
    Info: Processing started: Sun Nov 04 09:55:36 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off eeprom -c eeprom
Info: Found 1 design units, including 1 entities, in source file eeprom.v
    Info: Found entity 1: eeprom
Info: Elaborating entity "eeprom" for the top level hierarchy
Warning: (10270) Verilog HDL statement warning at eeprom.v(324): incomplete Case Statement has no default case item
Info: Verilog HDL Case Statement information at eeprom.v(324): all case item expressions in this Case Statement are onehot; consider adding a full_case attribute to reduce the logic required to implement this Case Statement
Info: Verilog HDL Case Statement information at eeprom.v(324): all case item expressions in this Case Statement are onehot; consider adding a full_case attribute to reduce the logic required to implement this Case Statement
Info: Verilog HDL Case Statement information at eeprom.v(199): all case item expressions in this Case Statement are onehot; consider adding a full_case attribute to reduce the logic required to implement this Case Statement
Info: Verilog HDL Case Statement information at eeprom.v(82): all case item expressions in this Case Statement are onehot; consider adding a full_case attribute to reduce the logic required to implement this Case Statement
Info: State machine "|eeprom|sh8out_state" contains 9 states and 0 state bits
Info: State machine "|eeprom|stop_state" contains 3 states and 0 state bits
Info: Selected Auto state machine encoding method for state machine "|eeprom|sh8out_state"
Info: Encoding result for state machine "|eeprom|sh8out_state"
    Info: Completed encoding using 9 state bits
        Info: Encoded state bit "sh8out_state.sh8out_end"
        Info: Encoded state bit "sh8out_state.sh8out_bit0"
        Info: Encoded state bit "sh8out_state.sh8out_bit1"
        Info: Encoded state bit "sh8out_state.sh8out_bit2"
        Info: Encoded state bit "sh8out_state.sh8out_bit3"
        Info: Encoded state bit "sh8out_state.sh8out_bit4"
        Info: Encoded state bit "sh8out_state.sh8out_bit5"
        Info: Encoded state bit "sh8out_state.sh8out_bit6"
        Info: Encoded state bit "sh8out_state.sh8out_bit7"
    Info: State "|eeprom|sh8out_state.sh8out_end" uses code string "000000000"
    Info: State "|eeprom|sh8out_state.sh8out_bit0" uses code string "110000000"
    Info: State "|eeprom|sh8out_state.sh8out_bit1" uses code string "101000000"
    Info: State "|eeprom|sh8out_state.sh8out_bit2" uses code string "100100000"
    Info: State "|eeprom|sh8out_state.sh8out_bit3" uses code string "100010000"
    Info: State "|eeprom|sh8out_state.sh8out_bit4" uses code string "100001000"
    Info: State "|eeprom|sh8out_state.sh8out_bit5" uses code string "100000100"
    Info: State "|eeprom|sh8out_state.sh8out_bit7" uses code string "100000001"
    Info: State "|eeprom|sh8out_state.sh8out_bit6" uses code string "100000010"
Info: Selected Auto state machine encoding method for state machine "|eeprom|stop_state"
Info: Encoding result for state machine "|eeprom|stop_state"
    Info: Completed encoding using 3 state bits
        Info: Encoded state bit "stop_state.stop_end"
        Info: Encoded state bit "stop_state.stop_bit"
        Info: Encoded state bit "stop_state.stop_begin"
    Info: State "|eeprom|stop_state.stop_end" uses code string "000"
    Info: State "|eeprom|stop_state.stop_bit" uses code string "110"
    Info: State "|eeprom|stop_state.stop_begin" uses code string "101"
Info: Implemented 421 device resources after synthesis - the final resource count might be different
    Info: Implemented 15 input pins
    Info: Implemented 34 output pins
    Info: Implemented 9 bidirectional pins
    Info: Implemented 363 logic cells
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 1 warning
    Info: Processing ended: Sun Nov 04 09:55:44 2007
    Info: Elapsed time: 00:00:08


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