pngenchuan_18.fit.summary

生成18级的m序列的VerilogHDL程序

Fitter Status : Successful - Wed Jan 23 15:54:43 2008
Quartus II Version : 7.2 Build 151 09/26/2007 SJ Full Version
Revision Name : PNGENchuan_18
Top-level Entity Name : PNGENchuan_18
Family : Cyclone II
Device : EP2C50F484C6
Timing Models : Final
Total logic elements : 19 / 50,528 ( < 1 % )
    Total combinational functions : 2 / 50,528 ( < 1 % )
    Dedicated logic registers : 19 / 50,528 ( < 1 % )
Total registers : 19
Total pins : 4 / 294 ( 1 % )
Total virtual pins : 0
Total memory bits : 0 / 594,432 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 172 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )