io_lvpecl_synopsys.v

基于VHDL语言的低压差分接口规范的实现

// synopsys dc_script_end
wire D_n,q_p,q_n;

INV  inv_n (.I(D), .O(D_n));
FDS off_p (.D(D),   .C(C), .S(S), .Q(q_p));
FDR off_n (.D(D_n), .C(C), .R(S), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_FDS_LVPECL

module OBUFDS_FDSE_LVPECL (D,CE,C,S,O,OB);
input D, CE, C, S;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_FDSE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;

INV  inv_n (.I(D), .O(D_n));
FDSE off_p (.D(D),   .CE(CE), .C(C), .S(S), .Q(q_p));
FDRE off_n (.D(D_n), .CE(CE), .C(C), .R(S), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_FDSE_LVPECL

// **************
// Output Latches
// **************

module OBUFDS_LD_LVPECL (D,G,O,OB);
input D, G;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_LD_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;
wire CLR = 0; // Used to ensure that p and n are opposite on reset

INV  inv_n (.I(D), .O(D_n));
LDC olatch_p (.D(D), .G(G), .CLR(CLR), .Q(q_p));   
		;
LDP olatch_n (.D(D_n), .G(G), .PRE(CLR), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_LD_LVPECL

module OBUFDS_LDE_LVPECL (D,GE,G,O,OB);
input D, GE, G;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_LDE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;
wire CLR = 0; // Used to ensure that p and n are opposite on reset

INV  inv_n (.I(D), .O(D_n));
LDCE olatch_p (.D(D),   .GE(GE), .G(G), .CLR(CLR), .Q(q_p));
LDPE olatch_n (.D(D_n), .GE(GE), .G(G), .PRE(CLR), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_LDE_LVPECL

module OBUFDS_LDC_LVPECL (D,G,CLR,O,OB);
input D, G, CLR;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_LDC_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;

INV  inv_n (.I(D), .O(D_n));
LDC olatch_p (.D(D),   .G(G), .CLR(CLR), .Q(q_p));
LDP olatch_n (.D(D_n), .G(G), .PRE(CLR), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_LDC_LVPECL

module OBUFDS_LDCE_LVPECL (D,GE,G,CLR,O,OB);
input D, GE, G, CLR;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_LDCE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;

INV  inv_n (.I(D), .O(D_n));
LDCE olatch_p (.D(D),   .GE(GE), .G(G), .CLR(CLR), .Q(q_p));
LDPE olatch_n (.D(D_n), .GE(GE), .G(G), .PRE(CLR), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_LDCE_LVPECL

module OBUFDS_LDP_LVPECL (D,G,PRE,O,OB);
input D, G, PRE;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_LDP_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;

INV  inv_n (.I(D), .O(D_n));
LDP olatch_p (.D(D),   .G(G), .PRE(PRE), .Q(q_p));
LDC olatch_n (.D(D_n), .G(G), .CLR(PRE), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_LDP_LVPECL

module OBUFDS_LDPE_LVPECL (D,GE,G,PRE,O,OB);
input D, GE, G, PRE;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFDS_LDPE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n;

INV  inv_n (.I(D), .O(D_n));
LDPE olatch_p (.D(D),   .GE(GE), .G(G), .PRE(PRE), .Q(q_p));
LDCE olatch_n (.D(D_n), .GE(GE), .G(G), .CLR(PRE), .Q(q_n));
OBUF_LVPECL pad_p (.I(q_p), .O(O));
OBUF_LVPECL pad_n (.I(q_n), .O(OB));

endmodule // OBUFDS_LDPE_LVPECL

// *************************************
// Start of the Tri-State Output Buffers
// Tri-state output flipflops
// *************************************

module OBUFTDS_FD_LVPECL (D,T,C,O,OB);
input D, T, C;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_FD_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;
wire CLR = 0;

INV inv_n (.I(D), .O(D_n));
FDC off_p (.D(D),   .C(C), .CLR(CLR), .Q(q_p));
FDP off_n (.D(D_n), .C(C), .PRE(CLR), .Q(q_n));
FDP tri_p (.D(T),   .C(C), .PRE(CLR), .Q(t_p));
FDP tri_n (.D(T),   .C(C), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FD_LVPECL

module OBUFTDS_FDE_LVPECL (D,T,CE,C,O,OB);
input D, T, CE, C;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_FDE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;
wire CLR = 0;

INV  inv_n (.I(D), .O(D_n));
FDCE off_p (.D(D),   .CE(CE), .C(C), .CLR(CLR), .Q(q_p)); 
	;
FDPE off_n (.D(D_n), .CE(CE), .C(C), .PRE(CLR), .Q(q_n));
FDPE tri_p (.D(T),   .CE(CE), .C(C), .PRE(CLR), .Q(t_p));
FDPE tri_n (.D(T),   .CE(CE), .C(C), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDE_LVPECL
 
module OBUFTDS_FDC_LVPECL (D,T,C,CLR,O,OB);
input D, T, C, CLR;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_FDC_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV inv_n (.I(D), .O(D_n));
FDC off_p (.D(D),   .C(C), .CLR(CLR), .Q(q_p));
FDP off_n (.D(D_n), .C(C), .PRE(CLR), .Q(q_n));
FDP tri_p (.D(T),   .C(C), .PRE(CLR), .Q(t_p));
FDP tri_n (.D(T),   .C(C), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDC_LVPECL

module OBUFTDS_FDCE_LVPECL (D,T,CE,C,CLR,O,OB);
input D, T, CE, C, CLR;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_FDCE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDCE off_p (.D(D),   .CE(CE), .C(C), .CLR(CLR), .Q(q_p));
FDPE off_n (.D(D_n), .CE(CE), .C(C), .PRE(CLR), .Q(q_n));
FDPE tri_p (.D(T),   .CE(CE), .C(C), .PRE(CLR), .Q(t_p));
FDPE tri_n (.D(T),   .CE(CE), .C(C), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDCE_LVPECL

module OBUFTDS_FDP_LVPECL (D,T,C,PRE,O,OB);
input D, T, C, PRE;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*")
// set_dont_touch current_design
// set_attribute OBUFTDS_FDP_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDP off_p (.D(D),   .C(C), .PRE(PRE), .Q(q_p));
FDC off_n (.D(D_n), .C(C), .CLR(PRE), .Q(q_n));
FDP tri_p (.D(T),   .C(C), .PRE(PRE), .Q(t_p));
FDP tri_n (.D(T),   .C(C), .PRE(PRE), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDP_LVPECL

module OBUFTDS_FDPE_LVPECL (D,T,CE,C,PRE,O,OB);
input D, T, CE, C, PRE;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*")
// set_dont_touch current_design
// set_attribute OBUFTDS_FDPE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDPE off_p (.D(D),   .CE(CE), .C(C), .PRE(PRE), .Q(q_p));
FDCE off_n (.D(D_n), .CE(CE), .C(C), .CLR(PRE), .Q(q_n));
FDPE tri_p (.D(T),   .CE(CE), .C(C), .PRE(PRE), .Q(t_p));
FDPE tri_n (.D(T),   .CE(CE), .C(C), .PRE(PRE), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDPE_LVPECL

module OBUFTDS_FDR_LVPECL (D,T,C,R,O,OB);
input D, T, C, R;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*")
// set_dont_touch current_design
// set_attribute OBUFTDS_FDR_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDR off_p (.D(D),   .C(C), .R(R), .Q(q_p));
FDS off_n (.D(D_n), .C(C), .S(R), .Q(q_n));
FDS tri_p (.D(T),   .C(C), .S(R), .Q(t_p));
FDS tri_n (.D(T),   .C(C), .S(R), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDR_LVPECL

module OBUFTDS_FDRE_LVPECL (D,T,CE,C,R,O,OB);
input D, T, CE, C, R;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*")
// set_dont_touch current_design
// set_attribute OBUFTDS_FDRE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDRE off_p (.D(D),   .CE(CE), .C(C), .R(R), .Q(q_p));
FDSE off_n (.D(D_n), .CE(CE), .C(C), .S(R), .Q(q_n));
FDSE tri_p (.D(T),   .CE(CE), .C(C), .S(R), .Q(t_p));
FDSE tri_n (.D(T),   .CE(CE), .C(C), .S(R), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDRE_LVPECL

module OBUFTDS_FDS_LVPECL (D,T,C,S,O,OB);
input D, T, C, S;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*")
// set_dont_touch current_design
// set_attribute OBUFTDS_FDS_IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDS off_p (.D(D),   .C(C), .S(S), .Q(q_p));
FDR off_n (.D(D_n), .C(C), .R(S), .Q(q_n));
FDS tri_p (.D(T),   .C(C), .S(S), .Q(t_p));
FDS tri_n (.D(T),   .C(C), .S(S), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDS_LVPECL

module OBUFTDS_FDSE_LVPECL (D,T,CE,C,S,O,OB);
input D, T, CE, C, S;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*")
// set_dont_touch current_design
// set_attribute OBUFTDS_FDSE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV  inv_n (.I(D), .O(D_n));
FDSE off_p (.D(D),   .CE(CE), .C(C), .S(S), .Q(q_p));
FDRE off_n (.D(D_n), .CE(CE), .C(C), .R(S), .Q(q_n));
FDSE tri_p (.D(T),   .CE(CE), .C(C), .S(S), .Q(t_p));
FDSE tri_n (.D(T),   .CE(CE), .C(C), .S(S), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_FDSE_LVPECL

// ************************
// Tri-state output LATCHES
// ************************

module OBUFTDS_LD_LVPECL (D,T,G,O,OB);
input D, T, G;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_LD_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;
wire CLR = 0;

INV inv_n (.I(D), .O(D_n));
LDC olatch_p (.D(D),   .G(G), .CLR(CLR), .Q(q_p));
LDP olatch_n (.D(D_n), .G(G), .PRE(CLR), .Q(q_n));
LDP tri_p (.D(T),   .G(G), .PRE(CLR), .Q(t_p));
LDP tri_n (.D(T),   .G(G), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_LD_LVPECL

module OBUFTDS_LDE_LVPECL (D,T,GE,G,O,OB);
input D, T, GE, G;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_LDE_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;
wire CLR = 0;

INV  inv_n (.I(D), .O(D_n));
LDCE olatch_p (.D(D),   .GE(GE), .G(G), .CLR(CLR), .Q(q_p));
LDPE olatch_n (.D(D_n), .GE(GE), .G(G), .PRE(CLR), .Q(q_n));
LDPE tri_p (.D(T),   .GE(GE), .G(G), .PRE(CLR), .Q(t_p));
LDPE tri_n (.D(T),   .GE(GE), .G(G), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_LDE_LVPECL
 
module OBUFTDS_LDC_LVPECL (D,T,G,CLR,O,OB);
input D, T, G, CLR;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_LDC_LVPECL IOB "true" -type string
// synopsys dc_script_end
wire D_n,q_p,q_n,t_p,t_n;

INV inv_n (.I(D), .O(D_n));
LDC olatch_p (.D(D),   .G(G), .CLR(CLR), .Q(q_p));
LDP olatch_n (.D(D_n), .G(G), .PRE(CLR), .Q(q_n));
LDP tri_p (.D(T),   .G(G), .PRE(CLR), .Q(t_p));
LDP tri_n (.D(T),   .G(G), .PRE(CLR), .Q(t_n));
OBUFT_LVPECL pad_p (.I(q_p), .T(t_p), .O(O));
OBUFT_LVPECL pad_n (.I(q_n), .T(t_n), .O(OB));

endmodule // OBUFTDS_LDC_LVPECL

module OBUFTDS_LDCE_LVPECL (D,T,GE,G,CLR,O,OB);
input D, T, GE, G, CLR;
output O,OB;

// synopsys dc_script_begin
// set_dont_touch find(cell,"*") 
// set_dont_touch current_design
// set_attribute OBUFTDS_LDCE_LVPECL IOB "true" -type string