io_lvds_pkg.vhd

基于VHDL语言的低压差分接口规范的实现

library ieee;
use ieee.std_logic_1164.all;

package lvds_macros is

  component IBUFDS_FD_LVDS
    port (
      I, IB, C : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDE_LVDS
    port (
      I, IB, CE, C : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDC_LVDS
    port (
      I, IB, C, CLR : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDCE_LVDS
    port (
      I, IB, CE, C, CLR : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDP_LVDS
    port (
      I, IB, C, PRE : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDPE_LVDS
    port (
      I, IB, CE, C, PRE : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDR_LVDS
    port (
      I, IB, C, R : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDRE_LVDS
    port (
      I, IB, CE, C, R : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDS_LVDS
    port (
      I, IB, C, S : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_FDSE_LVDS
    port (
      I, IB, CE, C, S : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_LD_LVDS
    port (
      I, IB, G : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_LDE_LVDS
    port (
      I, IB, GE, G : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_LDC_LVDS
    port (
      I, IB, G, CLR : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_LDCE_LVDS
    port (
      I, IB, GE, G, CLR : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_LDP_LVDS
    port (
      I, IB, G, PRE : in std_logic;
      Q : out std_logic
      );
  end component;

  component IBUFDS_LDPE_LVDS
    port (
      I, IB, GE, G, PRE : in std_logic;
      Q : out std_logic
      );
  end component;

  component OBUFDS_FD_LVDS
    port (
      D, C : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDE_LVDS
    port (
      D, CE, C : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDC_LVDS
    port (
      D, C, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDCE_LVDS
    port (
      D, CE, C, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDP_LVDS
    port (
      D, C, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDPE_LVDS
    port (
      D, CE, C, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDR_LVDS
    port (
      D, C, R : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDRE_LVDS
    port (
      D, CE, C, R : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDS_LVDS
    port (
      D, C, S : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_FDSE_LVDS
    port (
      D, CE, C, S : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_LD_LVDS
    port (
      D, G : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_LDE_LVDS
    port (
      D, GE, G : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_LDC_LVDS
    port (
      D, G, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_LDCE_LVDS
    port (
      D, GE, G, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_LDP_LVDS
    port (
      D, G, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFDS_LDPE_LVDS
    port (
      D, GE, G, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FD_LVDS
    port (
      D, T, C : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDE_LVDS
    port (
      D, T, CE, C : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDC_LVDS
    port (
      D, T, C, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDCE_LVDS
    port (
      D, T, CE, C, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDP_LVDS
    port (
      D, T, C, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDPE_LVDS
    port (
      D, T, CE, C, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDR_LVDS
    port (
      D, T, C, R : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDRE_LVDS
    port (
      D, T, CE, C, R : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDS_LVDS
    port (
      D, T, C, S : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_FDSE_LVDS
    port (
      D, T, CE, C, S : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_LD_LVDS
    port (
      D, T, G : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_LDE_LVDS
    port (
      D, T, GE, G : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_LDC_LVDS
    port (
      D, T, G, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_LDCE_LVDS
    port (
      D, T, GE, G, CLR : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_LDP_LVDS
    port (
      D, T, G, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component OBUFTDS_LDPE_LVDS
    port (
      D, T, GE, G, PRE : in std_logic;
      O, OB : out std_logic
      );
  end component;

  component IOBUFDS_FD_LVDS
    port (
      D, T, C : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDE_LVDS
    port (
      D, T, CE, C : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDC_LVDS
    port (
      D, T, C, CLR : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDCE_LVDS
    port (
      D, T, CE, C, CLR : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDP_LVDS
    port (
      D, T, C, PRE : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDPE_LVDS
    port (
      D, T, CE, C, PRE : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDR_LVDS
    port (
      D, T, C, R : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDRE_LVDS
    port (
      D, T, CE, C, R : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDS_LVDS
    port (
      D, T, C, S : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_FDSE_LVDS
    port (
      D, T, CE, C, S : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_LD_LVDS
    port (
      D, T, G : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_LDE_LVDS
    port (
      D, T, GE, G : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_LDC_LVDS
    port (
      D, T, G, CLR : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_LDCE_LVDS
    port (
      D, T, GE, G, CLR : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_LDP_LVDS
    port (
      D, T, G, PRE : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component;

  component IOBUFDS_LDPE_LVDS
    port (
      D, T, GE, G, PRE : in std_logic;
      Q : out std_logic;
      IO, IOB : inout std_logic
      );
  end component ;

end lvds_macros;