t_mux2.vhd

来自「是基于EDA系统上的一24小时制的数字钟设计」· VHDL 代码 · 共 16 行

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY t_mux2 IS
PORT(sel,a,b:IN STD_LOGIC;
     q:OUT STD_LOGIC);
END t_mux2;
ARCHITECTURE behav OF t_mux2 IS
BEGIN
PROCESS(a,b)
BEGIN
IF sel='0' THEN q<=a;
ELSE q<=b;
END IF;
END PROCESS;
END behav;