flip_latch.fit.eqn

采用Verilog HDL语言编写的数字频率计

--A1L73Q is Q0[2]~reg0 at LC2
A1L73Q_or_out = A0[2];
A1L73Q_reg_input = A1L73Q_or_out;
A1L73Q = DFFE(A1L73Q_reg_input, GLOBAL(clk), , , );


--A1L53Q is Q0[1]~reg0 at LC3
A1L53Q_or_out = A0[1];
A1L53Q_reg_input = A1L53Q_or_out;
A1L53Q = DFFE(A1L53Q_reg_input, GLOBAL(clk), , , );


--A1L33Q is Q0[0]~reg0 at LC4
A1L33Q_or_out = A0[0];
A1L33Q_reg_input = A1L33Q_or_out;
A1L33Q = DFFE(A1L33Q_reg_input, GLOBAL(clk), , , );


--A1L84Q is Q1[3]~reg0 at LC5
A1L84Q_or_out = A1[3];
A1L84Q_reg_input = A1L84Q_or_out;
A1L84Q = DFFE(A1L84Q_reg_input, GLOBAL(clk), , , );


--A1L64Q is Q1[2]~reg0 at LC6
A1L64Q_or_out = A1[2];
A1L64Q_reg_input = A1L64Q_or_out;
A1L64Q = DFFE(A1L64Q_reg_input, GLOBAL(clk), , , );


--A1L44Q is Q1[1]~reg0 at LC7
A1L44Q_or_out = A1[1];
A1L44Q_reg_input = A1L44Q_or_out;
A1L44Q = DFFE(A1L44Q_reg_input, GLOBAL(clk), , , );


--A1L24Q is Q1[0]~reg0 at LC9
A1L24Q_or_out = A1[0];
A1L24Q_reg_input = A1L24Q_or_out;
A1L24Q = DFFE(A1L24Q_reg_input, GLOBAL(clk), , , );


--A1L75Q is Q2[3]~reg0 at LC13
A1L75Q_or_out = A2[3];
A1L75Q_reg_input = A1L75Q_or_out;
A1L75Q = DFFE(A1L75Q_reg_input, GLOBAL(clk), , , );


--A1L55Q is Q2[2]~reg0 at LC14
A1L55Q_or_out = A2[2];
A1L55Q_reg_input = A1L55Q_or_out;
A1L55Q = DFFE(A1L55Q_reg_input, GLOBAL(clk), , , );


--A1L35Q is Q2[1]~reg0 at LC15
A1L35Q_or_out = A2[1];
A1L35Q_reg_input = A1L35Q_or_out;
A1L35Q = DFFE(A1L35Q_reg_input, GLOBAL(clk), , , );


--A1L15Q is Q2[0]~reg0 at LC16
A1L15Q_or_out = A2[0];
A1L15Q_reg_input = A1L15Q_or_out;
A1L15Q = DFFE(A1L15Q_reg_input, GLOBAL(clk), , , );


--A1L66Q is Q3[3]~reg0 at LC12
A1L66Q_or_out = A3[3];
A1L66Q_reg_input = A1L66Q_or_out;
A1L66Q = DFFE(A1L66Q_reg_input, GLOBAL(clk), , , );


--A1L46Q is Q3[2]~reg0 at LC11
A1L46Q_or_out = A3[2];
A1L46Q_reg_input = A1L46Q_or_out;
A1L46Q = DFFE(A1L46Q_reg_input, GLOBAL(clk), , , );


--A1L26Q is Q3[1]~reg0 at LC10
A1L26Q_or_out = A3[1];
A1L26Q_reg_input = A1L26Q_or_out;
A1L26Q = DFFE(A1L26Q_reg_input, GLOBAL(clk), , , );


--A1L06Q is Q3[0]~reg0 at LC25
A1L06Q_or_out = A3[0];
A1L06Q_reg_input = A1L06Q_or_out;
A1L06Q = DFFE(A1L06Q_reg_input, GLOBAL(clk), , , );


--A1L57Q is Q4[3]~reg0 at LC24
A1L57Q_or_out = A4[3];
A1L57Q_reg_input = A1L57Q_or_out;
A1L57Q = DFFE(A1L57Q_reg_input, GLOBAL(clk), , , );


--A1L37Q is Q4[2]~reg0 at LC23
A1L37Q_or_out = A4[2];
A1L37Q_reg_input = A1L37Q_or_out;
A1L37Q = DFFE(A1L37Q_reg_input, GLOBAL(clk), , , );


--A1L17Q is Q4[1]~reg0 at LC22
A1L17Q_or_out = A4[1];
A1L17Q_reg_input = A1L17Q_or_out;
A1L17Q = DFFE(A1L17Q_reg_input, GLOBAL(clk), , , );


--A1L96Q is Q4[0]~reg0 at LC21
A1L96Q_or_out = A4[0];
A1L96Q_reg_input = A1L96Q_or_out;
A1L96Q = DFFE(A1L96Q_reg_input, GLOBAL(clk), , , );


--A1L48Q is Q5[3]~reg0 at LC20
A1L48Q_or_out = A5[3];
A1L48Q_reg_input = A1L48Q_or_out;
A1L48Q = DFFE(A1L48Q_reg_input, GLOBAL(clk), , , );


--A1L28Q is Q5[2]~reg0 at LC19
A1L28Q_or_out = A5[2];
A1L28Q_reg_input = A1L28Q_or_out;
A1L28Q = DFFE(A1L28Q_reg_input, GLOBAL(clk), , , );


--A1L08Q is Q5[1]~reg0 at LC18
A1L08Q_or_out = A5[1];
A1L08Q_reg_input = A1L08Q_or_out;
A1L08Q = DFFE(A1L08Q_reg_input, GLOBAL(clk), , , );


--A1L87Q is Q5[0]~reg0 at LC17
A1L87Q_or_out = A5[0];
A1L87Q_reg_input = A1L87Q_or_out;
A1L87Q = DFFE(A1L87Q_reg_input, GLOBAL(clk), , , );


--A1L93Q is Q0[3]~reg0 at LC1
A1L93Q_or_out = A0[3];
A1L93Q_reg_input = A1L93Q_or_out;
A1L93Q = DFFE(A1L93Q_reg_input, GLOBAL(clk), , , );


--clk is clk at PIN_87
--operation mode is input

clk = INPUT();


--A0[3] is A0[3] at PIN_84
--operation mode is input

A0[3] = INPUT();


--A0[2] is A0[2] at PIN_85
--operation mode is input

A0[2] = INPUT();


--A0[1] is A0[1] at PIN_60
--operation mode is input

A0[1] = INPUT();


--A0[0] is A0[0] at PIN_58
--operation mode is input

A0[0] = INPUT();


--A1[3] is A1[3] at PIN_57
--operation mode is input

A1[3] = INPUT();


--A1[2] is A1[2] at PIN_56
--operation mode is input

A1[2] = INPUT();


--A1[1] is A1[1] at PIN_71
--operation mode is input

A1[1] = INPUT();


--A1[0] is A1[0] at PIN_46
--operation mode is input

A1[0] = INPUT();


--A2[3] is A2[3] at PIN_45
--operation mode is input

A2[3] = INPUT();


--A2[2] is A2[2] at PIN_16
--operation mode is input

A2[2] = INPUT();


--A2[1] is A2[1] at PIN_61
--operation mode is input

A2[1] = INPUT();


--A2[0] is A2[0] at PIN_17
--operation mode is input

A2[0] = INPUT();


--A3[3] is A3[3] at PIN_83
--operation mode is input

A3[3] = INPUT();


--A3[2] is A3[2] at PIN_19
--operation mode is input

A3[2] = INPUT();


--A3[1] is A3[1] at PIN_81
--operation mode is input

A3[1] = INPUT();


--A3[0] is A3[0] at PIN_20
--operation mode is input

A3[0] = INPUT();


--A4[3] is A4[3] at PIN_23
--operation mode is input

A4[3] = INPUT();


--A4[2] is A4[2] at PIN_52
--operation mode is input

A4[2] = INPUT();


--A4[1] is A4[1] at PIN_48
--operation mode is input

A4[1] = INPUT();


--A4[0] is A4[0] at PIN_47
--operation mode is input

A4[0] = INPUT();


--A5[3] is A5[3] at PIN_69
--operation mode is input

A5[3] = INPUT();


--A5[2] is A5[2] at PIN_68
--operation mode is input

A5[2] = INPUT();


--A5[1] is A5[1] at PIN_67
--operation mode is input

A5[1] = INPUT();


--A5[0] is A5[0] at PIN_44
--operation mode is input

A5[0] = INPUT();


--Q0[3] is Q0[3] at PIN_14
--operation mode is output

Q0[3] = OUTPUT(A1L93Q);


--Q0[2] is Q0[2] at PIN_13
--operation mode is output

Q0[2] = OUTPUT(A1L73Q);


--Q0[1] is Q0[1] at PIN_12
--operation mode is output

Q0[1] = OUTPUT(A1L53Q);


--Q0[0] is Q0[0] at PIN_10
--operation mode is output

Q0[0] = OUTPUT(A1L33Q);


--Q1[3] is Q1[3] at PIN_9
--operation mode is output

Q1[3] = OUTPUT(A1L84Q);


--Q1[2] is Q1[2] at PIN_8
--operation mode is output

Q1[2] = OUTPUT(A1L64Q);


--Q1[1] is Q1[1] at PIN_6
--operation mode is output

Q1[1] = OUTPUT(A1L44Q);


--Q1[0] is Q1[0] at PIN_100
--operation mode is output

Q1[0] = OUTPUT(A1L24Q);


--Q2[3] is Q2[3] at PIN_96
--operation mode is output

Q2[3] = OUTPUT(A1L75Q);


--Q2[2] is Q2[2] at PIN_94
--operation mode is output

Q2[2] = OUTPUT(A1L55Q);


--Q2[1] is Q2[1] at PIN_93
--operation mode is output

Q2[1] = OUTPUT(A1L35Q);


--Q2[0] is Q2[0] at PIN_92
--operation mode is output

Q2[0] = OUTPUT(A1L15Q);


--Q3[3] is Q3[3] at PIN_97
--operation mode is output

Q3[3] = OUTPUT(A1L66Q);


--Q3[2] is Q3[2] at PIN_98
--operation mode is output

Q3[2] = OUTPUT(A1L46Q);


--Q3[1] is Q3[1] at PIN_99
--operation mode is output

Q3[1] = OUTPUT(A1L26Q);


--Q3[0] is Q3[0] at PIN_25
--operation mode is output

Q3[0] = OUTPUT(A1L06Q);


--Q4[3] is Q4[3] at PIN_29
--operation mode is output

Q4[3] = OUTPUT(A1L57Q);


--Q4[2] is Q4[2] at PIN_30
--operation mode is output

Q4[2] = OUTPUT(A1L37Q);


--Q4[1] is Q4[1] at PIN_31
--operation mode is output

Q4[1] = OUTPUT(A1L17Q);


--Q4[0] is Q4[0] at PIN_32
--operation mode is output

Q4[0] = OUTPUT(A1L96Q);


--Q5[3] is Q5[3] at PIN_33
--operation mode is output

Q5[3] = OUTPUT(A1L48Q);


--Q5[2] is Q5[2] at PIN_35
--operation mode is output

Q5[2] = OUTPUT(A1L28Q);


--Q5[1] is Q5[1] at PIN_36
--operation mode is output

Q5[1] = OUTPUT(A1L08Q);


--Q5[0] is Q5[0] at PIN_37
--operation mode is output

Q5[0] = OUTPUT(A1L87Q);