alt_u_div_5ie.tdf

用最少的CPLD资源,用Verilog在QuartusII7.1上实现的1280分频.

--alt_u_div DEVICE_FAMILY="MAX II" LPM_PIPELINE=0 MAXIMIZE_SPEED=5 SKIP_BITS=0 WIDTH_D=3 WIDTH_N=3 WIDTH_Q=3 WIDTH_R=3 denominator numerator quotient remainder
--VERSION_BEGIN 7.1 cbx_cycloneii 2007:01:23:09:39:40:SJ cbx_lpm_abs 2006:04:25:14:52:42:SJ cbx_lpm_add_sub 2007:01:08:11:15:18:SJ cbx_lpm_divide 2007:01:30:03:58:02:SJ cbx_mgl 2007:04:03:14:06:46:SJ cbx_stratix 2007:04:12:16:43:52:SJ cbx_stratixii 2007:02:12:17:08:26:SJ cbx_util_mgl 2007:01:15:12:22:48:SJ  VERSION_END


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FUNCTION add_sub_e7c (dataa[0..0], datab[0..0])
RETURNS ( cout, result[0..0]);
FUNCTION add_sub_f7c (dataa[1..0], datab[1..0])
RETURNS ( cout, result[1..0]);
FUNCTION add_sub_g7c (dataa[2..0], datab[2..0])
RETURNS ( cout, result[2..0]);

--synthesis_resources = lut 3 
SUBDESIGN alt_u_div_5ie
( 
	den_out[2..0]	:	output;
	denominator[2..0]	:	input;
	numerator[2..0]	:	input;
	quotient[2..0]	:	output;
	remainder[2..0]	:	output;
) 
VARIABLE 
	add_sub_0 : add_sub_e7c;
	add_sub_1 : add_sub_f7c;
	add_sub_2 : add_sub_g7c;
	DenominatorIn[15..0]	: WIRE;
	DenominatorIn_tmp[15..0]	: WIRE;
	gnd_wire	: WIRE;
	nose[11..0]	: WIRE;
	NumeratorIn[11..0]	: WIRE;
	NumeratorIn_tmp[11..0]	: WIRE;
	prestg[8..0]	: WIRE;
	quotient_tmp[2..0]	: WIRE;
	sel[11..0]	: WIRE;
	selnose[11..0]	: WIRE;
	StageIn[11..0]	: WIRE;
	StageIn_tmp[11..0]	: WIRE;
	StageOut[8..0]	: WIRE;

BEGIN 
	add_sub_0.dataa[0..0] = NumeratorIn[2..2];
	add_sub_0.datab[0..0] = DenominatorIn[0..0];
	add_sub_1.dataa[] = ( StageIn[3..3], NumeratorIn[4..4]);
	add_sub_1.datab[1..0] = DenominatorIn[5..4];
	add_sub_2.dataa[] = ( StageIn[7..6], NumeratorIn[6..6]);
	add_sub_2.datab[2..0] = DenominatorIn[10..8];
	den_out[2..0] = DenominatorIn[10..8];
	DenominatorIn[] = (gnd_wire # DenominatorIn_tmp[]);
	DenominatorIn_tmp[] = ( DenominatorIn[11..0], ( gnd_wire, denominator[]));
	gnd_wire = B"0";
	nose[] = ( B"000", (add_sub_2.cout # gnd_wire), B"000", (add_sub_1.cout # gnd_wire), B"000", (add_sub_0.cout # gnd_wire));
	NumeratorIn[] = (gnd_wire # NumeratorIn_tmp[]);
	NumeratorIn_tmp[] = ( NumeratorIn[8..0], numerator[]);
	prestg[] = ( add_sub_2.result[], GND, add_sub_1.result[], B"00", add_sub_0.result[]);
	quotient[] = quotient_tmp[];
	quotient_tmp[] = ( (! selnose[0..0]), (! selnose[4..4]), (! selnose[8..8]));
	remainder[2..0] = StageIn[11..9];
	sel[] = ( gnd_wire, (gnd_wire # (sel[11..11] # DenominatorIn[14..14])), (gnd_wire # (sel[10..10] # DenominatorIn[13..13])), gnd_wire, (gnd_wire # (sel[8..8] # DenominatorIn[10..10])), (gnd_wire # (sel[7..7] # DenominatorIn[9..9])), gnd_wire, (gnd_wire # (sel[5..5] # DenominatorIn[6..6])), (gnd_wire # (sel[4..4] # DenominatorIn[5..5])), gnd_wire, (gnd_wire # (sel[2..2] # DenominatorIn[2..2])), (gnd_wire # (sel[1..1] # DenominatorIn[1..1])));
	selnose[] = ( ((gnd_wire # (! nose[11..11])) # sel[11..11]), ((gnd_wire # (! nose[10..10])) # sel[10..10]), ((gnd_wire # (! nose[9..9])) # sel[9..9]), ((gnd_wire # (! nose[8..8])) # sel[8..8]), ((gnd_wire # (! nose[7..7])) # sel[7..7]), ((gnd_wire # (! nose[6..6])) # sel[6..6]), ((gnd_wire # (! nose[5..5])) # sel[5..5]), ((gnd_wire # (! nose[4..4])) # sel[4..4]), ((gnd_wire # (! nose[3..3])) # sel[3..3]), ((gnd_wire # (! nose[2..2])) # sel[2..2]), ((gnd_wire # (! nose[1..1])) # sel[1..1]), ((gnd_wire # (! nose[0..0])) # sel[0..0]));
	StageIn[] = (gnd_wire # StageIn_tmp[]);
	StageIn_tmp[] = ( StageOut[8..0], B"000");
	StageOut[] = ( ((( StageIn[7..6], NumeratorIn[6..6]) & selnose[8..8]) # (prestg[8..6] & (! selnose[8..8]))), ((( StageIn[4..3], NumeratorIn[4..4]) & selnose[4..4]) # (prestg[5..3] & (! selnose[4..4]))), ((( StageIn[1..0], NumeratorIn[2..2]) & selnose[0..0]) # (prestg[2..0] & (! selnose[0..0]))));
END;
--VALID FILE