dds_vhdl.map.rpt

来自「rom地址宽度8位」· RPT 代码 · 共 518 行 · 第 1/3 页

; IGNORE_CARRY_BUFFERS   ; OFF         ; IGNORE_CARRY               ;
; AUTO_CASCADE_CHAINS    ; ON          ; AUTO_CASCADE               ;
; IGNORE_CASCADE_BUFFERS ; OFF         ; IGNORE_CASCADE             ;
+------------------------+-------------+----------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings Tables in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".


+-------------------------------+
; Analysis & Synthesis Messages ;
+-------------------------------+
Info: *******************************************************************
Info: Running Quartus II Analysis & Synthesis
    Info: Version 6.0 Build 178 04/27/2006 SJ Full Version
    Info: Processing started: Fri Dec 28 17:35:12 2007
Info: Command: quartus_map --read_settings_files=on --write_settings_files=off DDS_VHDL -c DDS_VHDL
Info: Found 2 design units, including 1 entities, in source file ADDER30B.vhd
    Info: Found design unit 1: ADDER30B-behav
    Info: Found entity 1: ADDER30B
Info: Found 2 design units, including 1 entities, in source file ADDER8B.vhd
    Info: Found design unit 1: ADDER8B-behav
    Info: Found entity 1: ADDER8B
Info: Found 2 design units, including 1 entities, in source file DDS_VHDL.vhd
    Info: Found design unit 1: DDS_VHDL-one
    Info: Found entity 1: DDS_VHDL
Info: Found 2 design units, including 1 entities, in source file REG30B.VHDL
    Info: Found design unit 1: REG30B-behav
    Info: Found entity 1: REG30B
Info: Found 2 design units, including 1 entities, in source file REG8B.vhd
    Info: Found design unit 1: REG8B-behav
    Info: Found entity 1: REG8B
Info: Elaborating entity "DDS_VHDL" for the top level hierarchy
Warning (10030): Tied undriven net "F30B[31]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[30]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[29]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[28]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[27]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[26]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[25]" at DDS_VHDL.vhd(45) to X
Warning (10030): Tied undriven net "F30B[24]" at DDS_VHDL.vhd(45) to X
Info: Elaborating entity "ADDER30B" for hierarchy "ADDER30B:u1"
Info: Elaborating entity "REG30B" for hierarchy "REG30B:u2"
Warning: Using design file SIN_ROM.vhd, which is not specified as a design file for the current project, but contains definitions for 2 design units and 1 entities in project
    Info: Found design unit 1: sin_rom-SYN
    Info: Found entity 1: SIN_ROM
Info: Elaborating entity "SIN_ROM" for hierarchy "SIN_ROM:u3"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf
    Info: Found entity 1: lpm_rom
Info: Elaborating entity "lpm_rom" for hierarchy "SIN_ROM:u3|lpm_rom:lpm_rom_component"
Info: Elaborated megafunction instantiation "SIN_ROM:u3|lpm_rom:lpm_rom_component"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altrom.tdf
    Info: Found entity 1: altrom
Info: Elaborating entity "altrom" for hierarchy "SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom"
Info: Elaborated megafunction instantiation "SIN_ROM:u3|lpm_rom:lpm_rom_component|altrom:srom", which is child of megafunction instantiation "SIN_ROM:u3|lpm_rom:lpm_rom_component"
Info: Instantiated megafunction "SIN_ROM:u3|lpm_rom:lpm_rom_component" with the following parameter:
    Info: Parameter "intended_device_family" = "FLEX10K"
    Info: Parameter "lpm_address_control" = "REGISTERED"
    Info: Parameter "lpm_file" = "ROM.MIF"
    Info: Parameter "lpm_outdata" = "UNREGISTERED"
    Info: Parameter "lpm_type" = "LPM_ROM"
    Info: Parameter "lpm_width" = "8"
    Info: Parameter "lpm_widthad" = "8"
Info: Elaborating entity "ADDER8B" for hierarchy "ADDER8B:u4"
Info: Elaborating entity "REG8B" for hierarchy "REG8B:u5"
Warning: Reduced register "REG30B:u2|DOUT[15]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[14]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[13]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[12]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[11]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[10]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[9]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[8]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[7]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[6]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[5]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[4]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[3]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[2]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[1]" with stuck data_in port to stuck value GND
Warning: Reduced register "REG30B:u2|DOUT[0]" with stuck data_in port to stuck value GND
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/lpm_add_sub.tdf
    Info: Found entity 1: lpm_add_sub
Info: Elaborated megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/addcore.tdf
    Info: Found entity 1: addcore
Info: Elaborated megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER8B:u4|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/a_csnbuffer.tdf
    Info: Found entity 1: a_csnbuffer
Info: Elaborated megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER8B:u4|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER8B:u4|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altshift.tdf
    Info: Found entity 1: altshift
Info: Elaborated megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER8B:u4|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0|altshift:carry_ext_latency_ffs", which is child of megafunction instantiation "ADDER8B:u4|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER8B:u4|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "8"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0"
Info: Elaborated megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0|addcore:adder", which is child of megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER30B:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:oflow_node", which is child of megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER30B:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0|addcore:adder|a_csnbuffer:result_node", which is child of megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER30B:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0|altshift:result_ext_latency_ffs", which is child of megafunction instantiation "ADDER30B:u1|lpm_add_sub:Add0"
Info: Instantiated megafunction "ADDER30B:u1|lpm_add_sub:Add0" with the following parameter:
    Info: Parameter "LPM_WIDTH" = "16"
    Info: Parameter "LPM_DIRECTION" = "ADD"
    Info: Parameter "LPM_REPRESENTATION" = "UNSIGNED"
    Info: Parameter "ONE_INPUT_IS_CONSTANT" = "NO"
Info: Elaborated megafunction instantiation "lpm_add_sub:Add0"
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[0] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[1] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[2] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[3] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[4] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[5] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[6] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u3|lpm_rom:lpm_rom_component|otri[7] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[0] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[1] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[2] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[3] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[4] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[5] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[6] feeding logic, open-drain buffer, or output pin
Warning: Removed always-enabled tri-state buffer SIN_ROM:u6|lpm_rom:lpm_rom_component|otri[7] feeding logic, open-drain buffer, or output pin
Info: Registers with preset signals will power-up high
Info: Implemented 108 device resources after synthesis - the final resource count might be different
    Info: Implemented 12 input pins
    Info: Implemented 16 output pins
    Info: Implemented 64 logic cells
    Info: Implemented 16 RAM segments
Info: Quartus II Analysis & Synthesis was successful. 0 errors, 41 warnings
    Info: Processing ended: Fri Dec 28 17:35:17 2007
    Info: Elapsed time: 00:00:06