dds_vhdl.map.qmsg

来自「rom地址宽度8位」· QMSG 代码 · 共 91 行 · 第 1/4 页

{ "Info" "ISGN_ELABORATION_HEADER" "SIN_ROM:u3\|lpm_rom:lpm_rom_component " "Info: Elaborated megafunction instantiation \"SIN_ROM:u3\|lpm_rom:lpm_rom_component\"" {  } { { "SIN_ROM.vhd" "" { Text "D:/source/Quartus/backup/DDS_2/SIN_ROM.vhd" 75 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus60/libraries/megafunctions/altrom.tdf 1 1 " "Info: Found 1 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/altrom.tdf" { { "Info" "ISGN_ENTITY_NAME" "1 altrom " "Info: Found entity 1: altrom" {  } { { "altrom.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/altrom.tdf" 75 1 0 } }  } 0 0 "Found entity %1!d!: %2!s!" 0 0}  } {  } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "altrom SIN_ROM:u3\|lpm_rom:lpm_rom_component\|altrom:srom " "Info: Elaborating entity \"altrom\" for hierarchy \"SIN_ROM:u3\|lpm_rom:lpm_rom_component\|altrom:srom\"" {  } { { "lpm_rom.tdf" "srom" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf" 52 3 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "SIN_ROM:u3\|lpm_rom:lpm_rom_component\|altrom:srom SIN_ROM:u3\|lpm_rom:lpm_rom_component " "Info: Elaborated megafunction instantiation \"SIN_ROM:u3\|lpm_rom:lpm_rom_component\|altrom:srom\", which is child of megafunction instantiation \"SIN_ROM:u3\|lpm_rom:lpm_rom_component\"" {  } { { "lpm_rom.tdf" "" { Text "c:/altera/quartus60/libraries/megafunctions/lpm_rom.tdf" 52 3 0 } } { "SIN_ROM.vhd" "" { Text "D:/source/Quartus/backup/DDS_2/SIN_ROM.vhd" 75 -1 0 } }  } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
{ "Info" "ISGN_MEGAFN_PARAM_TOP" "SIN_ROM:u3\|lpm_rom:lpm_rom_component " "Info: Instantiated megafunction \"SIN_ROM:u3\|lpm_rom:lpm_rom_component\" with the following parameter:" { { "Info" "ISGN_MEGAFN_PARAM_SUB" "intended_device_family FLEX10K " "Info: Parameter \"intended_device_family\" = \"FLEX10K\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_address_control REGISTERED " "Info: Parameter \"lpm_address_control\" = \"REGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_file ROM.MIF " "Info: Parameter \"lpm_file\" = \"ROM.MIF\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_outdata UNREGISTERED " "Info: Parameter \"lpm_outdata\" = \"UNREGISTERED\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_type LPM_ROM " "Info: Parameter \"lpm_type\" = \"LPM_ROM\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_width 8 " "Info: Parameter \"lpm_width\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0} { "Info" "ISGN_MEGAFN_PARAM_SUB" "lpm_widthad 8 " "Info: Parameter \"lpm_widthad\" = \"8\"" {  } {  } 0 0 "Parameter \"%1!s!\" = \"%2!s!\"" 0 0}  } { { "SIN_ROM.vhd" "" { Text "D:/source/Quartus/backup/DDS_2/SIN_ROM.vhd" 75 -1 0 } }  } 0 0 "Instantiated megafunction \"%1!s!\" with the following parameter:" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "ADDER8B ADDER8B:u4 " "Info: Elaborating entity \"ADDER8B\" for hierarchy \"ADDER8B:u4\"" {  } { { "DDS_VHDL.vhd" "u4" { Text "D:/source/Quartus/backup/DDS_2/DDS_VHDL.vhd" 73 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "REG8B REG8B:u5 " "Info: Elaborating entity \"REG8B\" for hierarchy \"REG8B:u5\"" {  } { { "DDS_VHDL.vhd" "u5" { Text "D:/source/Quartus/backup/DDS_2/DDS_VHDL.vhd" 74 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[15\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[15\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[14\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[14\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[13\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[13\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[12\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[12\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[11\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[11\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[10\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[10\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[9\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[9\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[8\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[8\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[7\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[7\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[6\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[6\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[5\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[5\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[4\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[4\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[3\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[3\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[2\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[2\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[1\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[1\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}
{ "Warning" "WCDB_SGATE_CDB_WARN_TRIVIAL_REG" "REG30B:u2\|DOUT\[0\] data_in GND " "Warning: Reduced register \"REG30B:u2\|DOUT\[0\]\" with stuck data_in port to stuck value GND" {  } { { "REG30B.VHDL" "" { Text "D:/source/Quartus/backup/DDS_2/REG30B.VHDL" 13 -1 0 } }  } 0 0 "Reduced register \"%1!s!\" with stuck %2!s! port to stuck value %3!s!" 0 0}