wave.fit.eqn

数字示波器的FPGA实现 VHDL编写 Quartus7.1测试通过

--operation mode is arithmetic

N2_TEMP[6] = DFFEA(N2L51, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N2L64, , );

--N2L56 is VOLTAGE_CONV:inst15|TEMP[6]~COUT0 at LC_X17_Y6_N6
--operation mode is arithmetic

N2L56_cout_0 = G1_RAMTMP2[6] & (W1_q_b[6] # !N2L26) # !G1_RAMTMP2[6] & W1_q_b[6] & !N2L26;
N2L56 = CARRY(N2L56_cout_0);

--N2L66 is VOLTAGE_CONV:inst15|TEMP[6]~COUT1 at LC_X17_Y6_N6
--operation mode is arithmetic

N2L66_cout_1 = G1_RAMTMP2[6] & (W1_q_b[6] # !N2L36) # !G1_RAMTMP2[6] & W1_q_b[6] & !N2L36;
N2L66 = CARRY(N2L66_cout_1);


--F1_REG_Q[20] is generator_accB:inst4|REG_Q[20] at LC_X18_Y5_N2
--operation mode is normal

F1_REG_Q[20]_lut_out = F1L37 & (F1L99 # !F1L57);
F1_REG_Q[20] = DFFEA(F1_REG_Q[20]_lut_out, GLOBAL(K1_CLK), !G1_TMP, , , , );


--N1L31 is VOLTAGE_CONV:inst12|add~6 at LC_X10_Y7_N5
--operation mode is arithmetic

N1L31_carry_eqn = (!N1L01 & GND) # (N1L01 & VCC);
N1L31 = G1_RAMTMP5[5] $ W2_q_b[5] $ N1L31_carry_eqn;

--N1_TEMP[5] is VOLTAGE_CONV:inst12|TEMP[5] at LC_X10_Y7_N5
--operation mode is arithmetic

N1_TEMP[5] = DFFEA(N1L31, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N1L64, , );

--N1L26 is VOLTAGE_CONV:inst12|TEMP[5]~COUT0 at LC_X10_Y7_N5
--operation mode is arithmetic

N1L26_cout_0 = G1_RAMTMP5[5] & !W2_q_b[5] & !N1L01 # !G1_RAMTMP5[5] & (!N1L01 # !W2_q_b[5]);
N1L26 = CARRY(N1L26_cout_0);

--N1L36 is VOLTAGE_CONV:inst12|TEMP[5]~COUT1 at LC_X10_Y7_N5
--operation mode is arithmetic

N1L36_cout_1 = G1_RAMTMP5[5] & !W2_q_b[5] & !N1L01 # !G1_RAMTMP5[5] & (!N1L01 # !W2_q_b[5]);
N1L36 = CARRY(N1L36_cout_1);


--N2L31 is VOLTAGE_CONV:inst15|add~6 at LC_X17_Y6_N5
--operation mode is arithmetic

N2L31_carry_eqn = (!N2L01 & GND) # (N2L01 & VCC);
N2L31 = G1_RAMTMP2[5] $ W1_q_b[5] $ N2L31_carry_eqn;

--N2_TEMP[5] is VOLTAGE_CONV:inst15|TEMP[5] at LC_X17_Y6_N5
--operation mode is arithmetic

N2_TEMP[5] = DFFEA(N2L31, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N2L64, , );

--N2L26 is VOLTAGE_CONV:inst15|TEMP[5]~COUT0 at LC_X17_Y6_N5
--operation mode is arithmetic

N2L26_cout_0 = G1_RAMTMP2[5] & !W1_q_b[5] & !N2L01 # !G1_RAMTMP2[5] & (!N2L01 # !W1_q_b[5]);
N2L26 = CARRY(N2L26_cout_0);

--N2L36 is VOLTAGE_CONV:inst15|TEMP[5]~COUT1 at LC_X17_Y6_N5
--operation mode is arithmetic

N2L36_cout_1 = G1_RAMTMP2[5] & !W1_q_b[5] & !N2L01 # !G1_RAMTMP2[5] & (!N2L01 # !W1_q_b[5]);
N2L36 = CARRY(N2L36_cout_1);


--F1_REG_Q[19] is generator_accB:inst4|REG_Q[19] at LC_X15_Y4_N2
--operation mode is normal

F1_REG_Q[19]_lut_out = F1L96 & (F1L99 # !F1L37 # !F1L57);
F1_REG_Q[19] = DFFEA(F1_REG_Q[19]_lut_out, GLOBAL(K1_CLK), !G1_TMP, , , , );


--N1L9 is VOLTAGE_CONV:inst12|add~5 at LC_X10_Y7_N4
--operation mode is arithmetic

N1L9 = G1_RAMTMP5[4] $ W2_q_b[4] $ !N1L85;

--N1_TEMP[4] is VOLTAGE_CONV:inst12|TEMP[4] at LC_X10_Y7_N4
--operation mode is arithmetic

N1_TEMP[4] = DFFEA(N1L9, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N1L64, , );

--N1L01 is VOLTAGE_CONV:inst12|add~5COUT at LC_X10_Y7_N4
--operation mode is arithmetic

N1L01 = N1L11;


--N2L9 is VOLTAGE_CONV:inst15|add~5 at LC_X17_Y6_N4
--operation mode is arithmetic

N2L9 = G1_RAMTMP2[4] $ W1_q_b[4] $ !N2L85;

--N2_TEMP[4] is VOLTAGE_CONV:inst15|TEMP[4] at LC_X17_Y6_N4
--operation mode is arithmetic

N2_TEMP[4] = DFFEA(N2L9, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N2L64, , );

--N2L01 is VOLTAGE_CONV:inst15|add~5COUT at LC_X17_Y6_N4
--operation mode is arithmetic

N2L01 = N2L11;


--F1_REG_Q[18] is generator_accB:inst4|REG_Q[18] at LC_X15_Y4_N3
--operation mode is normal

F1_REG_Q[18]_lut_out = F1L56 & (F1L99 # !F1L57 # !F1L37);
F1_REG_Q[18] = DFFEA(F1_REG_Q[18]_lut_out, GLOBAL(K1_CLK), !G1_TMP, , , , );


--N1L7 is VOLTAGE_CONV:inst12|add~4 at LC_X10_Y7_N3
--operation mode is arithmetic

N1L7 = W2_q_b[3] $ G1_RAMTMP5[3] $ N1L55;

--N1_TEMP[3] is VOLTAGE_CONV:inst12|TEMP[3] at LC_X10_Y7_N3
--operation mode is arithmetic

N1_TEMP[3] = DFFEA(N1L7, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N1L64, , );

--N1L85 is VOLTAGE_CONV:inst12|TEMP[3]~COUT0 at LC_X10_Y7_N3
--operation mode is arithmetic

N1L85_cout_0 = W2_q_b[3] & !G1_RAMTMP5[3] & !N1L55 # !W2_q_b[3] & (!N1L55 # !G1_RAMTMP5[3]);
N1L85 = CARRY(N1L85_cout_0);

--N1L95 is VOLTAGE_CONV:inst12|TEMP[3]~COUT1 at LC_X10_Y7_N3
--operation mode is arithmetic

N1L95_cout_1 = W2_q_b[3] & !G1_RAMTMP5[3] & !N1L65 # !W2_q_b[3] & (!N1L65 # !G1_RAMTMP5[3]);
N1L95 = CARRY(N1L95_cout_1);


--N2L7 is VOLTAGE_CONV:inst15|add~4 at LC_X17_Y6_N3
--operation mode is arithmetic

N2L7 = G1_RAMTMP2[3] $ W1_q_b[3] $ N2L55;

--N2_TEMP[3] is VOLTAGE_CONV:inst15|TEMP[3] at LC_X17_Y6_N3
--operation mode is arithmetic

N2_TEMP[3] = DFFEA(N2L7, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N2L64, , );

--N2L85 is VOLTAGE_CONV:inst15|TEMP[3]~COUT0 at LC_X17_Y6_N3
--operation mode is arithmetic

N2L85_cout_0 = G1_RAMTMP2[3] & !W1_q_b[3] & !N2L55 # !G1_RAMTMP2[3] & (!N2L55 # !W1_q_b[3]);
N2L85 = CARRY(N2L85_cout_0);

--N2L95 is VOLTAGE_CONV:inst15|TEMP[3]~COUT1 at LC_X17_Y6_N3
--operation mode is arithmetic

N2L95_cout_1 = G1_RAMTMP2[3] & !W1_q_b[3] & !N2L65 # !G1_RAMTMP2[3] & (!N2L65 # !W1_q_b[3]);
N2L95 = CARRY(N2L95_cout_1);


--F1_REG_Q[17] is generator_accB:inst4|REG_Q[17] at LC_X16_Y5_N8
--operation mode is normal

F1_REG_Q[17]_lut_out = F1L16 & (F1L99 # !F1L37 # !F1L57);
F1_REG_Q[17] = DFFEA(F1_REG_Q[17]_lut_out, GLOBAL(K1_CLK), !G1_TMP, , , , );


--N1L5 is VOLTAGE_CONV:inst12|add~3 at LC_X10_Y7_N2
--operation mode is arithmetic

N1L5 = G1_RAMTMP5[2] $ W2_q_b[2] $ !N1L25;

--N1_TEMP[2] is VOLTAGE_CONV:inst12|TEMP[2] at LC_X10_Y7_N2
--operation mode is arithmetic

N1_TEMP[2] = DFFEA(N1L5, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N1L64, , );

--N1L55 is VOLTAGE_CONV:inst12|TEMP[2]~COUT0 at LC_X10_Y7_N2
--operation mode is arithmetic

N1L55_cout_0 = G1_RAMTMP5[2] & (W2_q_b[2] # !N1L25) # !G1_RAMTMP5[2] & W2_q_b[2] & !N1L25;
N1L55 = CARRY(N1L55_cout_0);

--N1L65 is VOLTAGE_CONV:inst12|TEMP[2]~COUT1 at LC_X10_Y7_N2
--operation mode is arithmetic

N1L65_cout_1 = G1_RAMTMP5[2] & (W2_q_b[2] # !N1L35) # !G1_RAMTMP5[2] & W2_q_b[2] & !N1L35;
N1L65 = CARRY(N1L65_cout_1);


--N2L5 is VOLTAGE_CONV:inst15|add~3 at LC_X17_Y6_N2
--operation mode is arithmetic

N2L5 = G1_RAMTMP2[2] $ W1_q_b[2] $ !N2L25;

--N2_TEMP[2] is VOLTAGE_CONV:inst15|TEMP[2] at LC_X17_Y6_N2
--operation mode is arithmetic

N2_TEMP[2] = DFFEA(N2L5, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N2L64, , );

--N2L55 is VOLTAGE_CONV:inst15|TEMP[2]~COUT0 at LC_X17_Y6_N2
--operation mode is arithmetic

N2L55_cout_0 = G1_RAMTMP2[2] & (W1_q_b[2] # !N2L25) # !G1_RAMTMP2[2] & W1_q_b[2] & !N2L25;
N2L55 = CARRY(N2L55_cout_0);

--N2L65 is VOLTAGE_CONV:inst15|TEMP[2]~COUT1 at LC_X17_Y6_N2
--operation mode is arithmetic

N2L65_cout_1 = G1_RAMTMP2[2] & (W1_q_b[2] # !N2L35) # !G1_RAMTMP2[2] & W1_q_b[2] & !N2L35;
N2L65 = CARRY(N2L65_cout_1);


--F1_REG_Q[16] is generator_accB:inst4|REG_Q[16] at LC_X16_Y9_N8
--operation mode is normal

F1_REG_Q[16]_lut_out = F1L75 & (F1L99 # !F1L37 # !F1L57);
F1_REG_Q[16] = DFFEA(F1_REG_Q[16]_lut_out, GLOBAL(K1_CLK), !G1_TMP, , , , );


--N1L3 is VOLTAGE_CONV:inst12|add~2 at LC_X10_Y7_N1
--operation mode is arithmetic

N1L3 = W2_q_b[1] $ G1_RAMTMP5[1] $ N1L94;

--N1_TEMP[1] is VOLTAGE_CONV:inst12|TEMP[1] at LC_X10_Y7_N1
--operation mode is arithmetic

N1_TEMP[1] = DFFEA(N1L3, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N1L64, , );

--N1L25 is VOLTAGE_CONV:inst12|TEMP[1]~COUT0 at LC_X10_Y7_N1
--operation mode is arithmetic

N1L25_cout_0 = W2_q_b[1] & !G1_RAMTMP5[1] & !N1L94 # !W2_q_b[1] & (!N1L94 # !G1_RAMTMP5[1]);
N1L25 = CARRY(N1L25_cout_0);

--N1L35 is VOLTAGE_CONV:inst12|TEMP[1]~COUT1 at LC_X10_Y7_N1
--operation mode is arithmetic

N1L35_cout_1 = W2_q_b[1] & !G1_RAMTMP5[1] & !N1L05 # !W2_q_b[1] & (!N1L05 # !G1_RAMTMP5[1]);
N1L35 = CARRY(N1L35_cout_1);


--N2L3 is VOLTAGE_CONV:inst15|add~2 at LC_X17_Y6_N1
--operation mode is arithmetic

N2L3 = W1_q_b[1] $ G1_RAMTMP2[1] $ N2L94;

--N2_TEMP[1] is VOLTAGE_CONV:inst15|TEMP[1] at LC_X17_Y6_N1
--operation mode is arithmetic

N2_TEMP[1] = DFFEA(N2L3, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N2L64, , );

--N2L25 is VOLTAGE_CONV:inst15|TEMP[1]~COUT0 at LC_X17_Y6_N1
--operation mode is arithmetic

N2L25_cout_0 = W1_q_b[1] & !G1_RAMTMP2[1] & !N2L94 # !W1_q_b[1] & (!N2L94 # !G1_RAMTMP2[1]);
N2L25 = CARRY(N2L25_cout_0);

--N2L35 is VOLTAGE_CONV:inst15|TEMP[1]~COUT1 at LC_X17_Y6_N1
--operation mode is arithmetic

N2L35_cout_1 = W1_q_b[1] & !G1_RAMTMP2[1] & !N2L05 # !W1_q_b[1] & (!N2L05 # !G1_RAMTMP2[1]);
N2L35 = CARRY(N2L35_cout_1);


--F1_REG_Q[15] is generator_accB:inst4|REG_Q[15] at LC_X17_Y7_N9
--operation mode is normal

F1_REG_Q[15]_lut_out = F1L55 & (F1L99 # !F1L57 # !F1L37);
F1_REG_Q[15] = DFFEA(F1_REG_Q[15]_lut_out, GLOBAL(K1_CLK), !G1_TMP, , , , );


--N1L1 is VOLTAGE_CONV:inst12|add~1 at LC_X10_Y7_N0
--operation mode is arithmetic

N1L1 = G1_RAMTMP5[0] $ W2_q_b[0];

--N1_TEMP[0] is VOLTAGE_CONV:inst12|TEMP[0] at LC_X10_Y7_N0
--operation mode is arithmetic

N1_TEMP[0] = DFFEA(N1L1, !GLOBAL(P1_CLK), !GLOBAL(U1L6), , !N1L64, , );

--N1L94 is VOLTAGE_CONV:inst12|TEMP[0]~COUT0 at LC_X10_Y7_N0
--operation mode is arithmetic

N1L94_cout_0 = G1_RAMTMP5[0] & W2_q_b[0];
N1L94 = CARRY(N1L94_cout_0);

--N1L05 is VOLTAGE_CONV:inst12|TEMP[0]~COUT1 at LC_X10_Y7_N0
--operation mode is arithmetic

N1L05_cout_1 = G1_RAMTMP5[0] & W2_q_b[0];