scanwave.qsf

数字示波器的FPGA实现 VHDL编写 Quartus7.1测试通过

# Copyright (C) 1991-2004 Altera Corporation
# Any  megafunction  design,  and related netlist (encrypted  or  decrypted),
# support information,  device programming or simulation file,  and any other
# associated  documentation or information  provided by  Altera  or a partner
# under  Altera's   Megafunction   Partnership   Program  may  be  used  only
# to program  PLD  devices (but not masked  PLD  devices) from  Altera.   Any
# other  use  of such  megafunction  design,  netlist,  support  information,
# device programming or simulation file,  or any other  related documentation
# or information  is prohibited  for  any  other purpose,  including, but not
# limited to  modification,  reverse engineering,  de-compiling, or use  with
# any other  silicon devices,  unless such use is  explicitly  licensed under
# a separate agreement with  Altera  or a megafunction partner.  Title to the
# intellectual property,  including patents,  copyrights,  trademarks,  trade
# secrets,  or maskworks,  embodied in any such megafunction design, netlist,
# support  information,  device programming or simulation file,  or any other
# related documentation or information provided by  Altera  or a megafunction
# partner, remains with Altera, the megafunction partner, or their respective
# licensors. No other licenses, including any licenses needed under any third
# party's intellectual property, are provided herein.


# The default values for assignments are stored in the file
#		scanwave_assignment_defaults.qdf
# If this file doesn't exist, and for assignments not listed, see file
#		assignment_defaults.qdf

# Altera recommends that you do not modify this file. This
# file is updated automatically by the Quartus II software
# and any changes you make may be lost or overwritten.


# Project-Wide Assignments
# ========================
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 4.1
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:09:30  AUGUST 10, 2005"
set_global_assignment -name LAST_QUARTUS_VERSION 7.1
set_global_assignment -name VHDL_FILE MUX2_1.vhd
set_global_assignment -name VHDL_FILE AD_SRAM.vhd
set_global_assignment -name VHDL_FILE BUS_1.vhd
set_global_assignment -name VHDL_FILE BUSTRI.vhd
set_global_assignment -name VHDL_FILE CONV_SINGLE.vhd
set_global_assignment -name VHDL_FILE fredevider8.vhd
set_global_assignment -name VHDL_FILE generator_accb.vhd
set_global_assignment -name VHDL_FILE GENERATOR_ADD.vhd
set_global_assignment -name VHDL_FILE generator_reg8.vhd
set_global_assignment -name VHDL_FILE generator_reg81.vhd
set_global_assignment -name VHDL_FILE GET_RDADDR.VHD
set_global_assignment -name VHDL_FILE max114.vhd
set_global_assignment -name VHDL_FILE VOLTAGE_CONV.vhd
set_global_assignment -name BDF_FILE SCANWAVE.bdf
set_global_assignment -name VHDL_FILE fredevider2.vhd
set_global_assignment -name VHDL_FILE MUX2_3.vhd
set_global_assignment -name VHDL_FILE freq_count.vhd
set_global_assignment -name VHDL_FILE fredevider10.vhd
set_global_assignment -name VHDL_FILE AMPL_COUNT.vhd
set_global_assignment -name BDF_FILE SCANWAVE_2.bdf
set_global_assignment -name BDF_FILE SCANWAVE_3.bdf

# Pin & Location Assignments
# ==========================
set_location_assignment PIN_27 -to A0
set_location_assignment PIN_28 -to A1
set_location_assignment PIN_91 -to ADIN\[0\]
set_location_assignment PIN_4 -to ADIN\[1\]
set_location_assignment PIN_5 -to ADIN\[2\]
set_location_assignment PIN_6 -to ADIN\[3\]
set_location_assignment PIN_7 -to ADIN\[4\]
set_location_assignment PIN_10 -to ADIN\[5\]
set_location_assignment PIN_11 -to ADIN\[6\]
set_location_assignment PIN_26 -to ADIN\[7\]
set_location_assignment PIN_78 -to ALE
set_location_assignment PIN_16 -to CLK
set_location_assignment PIN_94 -to CS
set_location_assignment PIN_31 -to CSAD
set_location_assignment PIN_49 -to DAXOUT\[0\]
set_location_assignment PIN_48 -to DAXOUT\[1\]
set_location_assignment PIN_47 -to DAXOUT\[2\]
set_location_assignment PIN_42 -to DAXOUT\[3\]
set_location_assignment PIN_41 -to DAXOUT\[4\]
set_location_assignment PIN_40 -to DAXOUT\[5\]
set_location_assignment PIN_39 -to DAXOUT\[6\]
set_location_assignment PIN_38 -to DAXOUT\[7\]
set_location_assignment PIN_67 -to DAYOUT\[0\]
set_location_assignment PIN_62 -to DAYOUT\[1\]
set_location_assignment PIN_61 -to DAYOUT\[2\]
set_location_assignment PIN_60 -to DAYOUT\[3\]
set_location_assignment PIN_59 -to DAYOUT\[4\]
set_location_assignment PIN_58 -to DAYOUT\[5\]
set_location_assignment PIN_57 -to DAYOUT\[6\]
set_location_assignment PIN_56 -to DAYOUT\[7\]
set_location_assignment PIN_2 -to INTN
set_location_assignment PIN_75 -to P0\[0\]
set_location_assignment PIN_74 -to P0\[1\]
set_location_assignment PIN_73 -to P0\[2\]
set_location_assignment PIN_72 -to P0\[3\]
set_location_assignment PIN_71 -to P0\[4\]
set_location_assignment PIN_70 -to P0\[5\]
set_location_assignment PIN_69 -to P0\[6\]
set_location_assignment PIN_68 -to P0\[7\]
set_location_assignment PIN_85 -to P2\[0\]
set_location_assignment PIN_84 -to P2\[1\]
set_location_assignment PIN_83 -to P2\[2\]
set_location_assignment PIN_82 -to P2\[3\]
set_location_assignment PIN_79 -to P2\[4\]
set_location_assignment PIN_76 -to RD
set_location_assignment PIN_35 -to RDAD
set_location_assignment PIN_77 -to WR
set_location_assignment PIN_36 -to CSDA1
set_location_assignment PIN_55 -to CSDA2
set_location_assignment PIN_37 -to WRDA
set_location_assignment PIN_54 -to XFER
set_location_assignment PIN_52 -to CLK2
set_location_assignment PIN_51 -to A

# Analysis & Synthesis Assignments
# ================================
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 144
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 8
set_global_assignment -name FAMILY Cyclone
set_global_assignment -name TOP_LEVEL_ENTITY SCANWAVE

# Fitter Assignments
# ==================
set_global_assignment -name DEVICE EP1C3T144C8

# LogicLock Region Assignments
# ============================
set_global_assignment -name LOGICLOCK_INCREMENTAL_COMPILE_ASSIGNMENT OFF

set_instance_assignment -name PARTITION_HIERARCHY no_file_for_top_partition -to | -section_id Top
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top