scanwave.hif

数字示波器的FPGA实现 VHDL编写 Quartus7.1测试通过

DEF
PORT_A_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_ADDRESS_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_BYTE_ENABLE_MASK_WIDTH
1
PARAMETER_UNKNOWN
DEF
PORT_B_DATA_WIDTH
1
PARAMETER_UNKNOWN
DEF
}
# used_port {
wren_a
-1
3
q_b7
-1
3
q_b6
-1
3
q_b5
-1
3
q_b4
-1
3
q_b3
-1
3
q_b2
-1
3
q_b1
-1
3
q_b0
-1
3
data_a7
-1
3
data_a6
-1
3
data_a5
-1
3
data_a4
-1
3
data_a3
-1
3
data_a2
-1
3
data_a1
-1
3
data_a0
-1
3
clock1
-1
3
clock0
-1
3
address_b9
-1
3
address_b8
-1
3
address_b7
-1
3
address_b6
-1
3
address_b5
-1
3
address_b4
-1
3
address_b3
-1
3
address_b2
-1
3
address_b10
-1
3
address_b1
-1
3
address_b0
-1
3
address_a9
-1
3
address_a8
-1
3
address_a7
-1
3
address_a6
-1
3
address_a5
-1
3
address_a4
-1
3
address_a3
-1
3
address_a2
-1
3
address_a10
-1
3
address_a1
-1
3
address_a0
-1
3
}
# hierarchies {
dram:inst|altsyncram:altsyncram_component|altsyncram_fbg1:auto_generated
dram:inst14|altsyncram:altsyncram_component|altsyncram_fbg1:auto_generated
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
AD_SRAM
# storage
db|scanwave.(9).cnf
db|scanwave.(9).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
AD_SRAM.vhd
223ff8c38bc4fdac93936f4b3e9cd9
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
AD_SRAM:inst19
AD_SRAM:inst20
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
CONV_SINGLE
# storage
db|scanwave.(10).cnf
db|scanwave.(10).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
CONV_SINGLE.vhd
6993ef6c94debd172956e0ef81c94c2
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
CONV_SINGLE:inst22
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
GET_RDADDR
# storage
db|scanwave.(11).cnf
db|scanwave.(11).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
GET_RDADDR.VHD
db32d99b84403ff5b0e0ff85a22fd
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
GET_RDADDR:inst10
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
generator_accB
# storage
db|scanwave.(12).cnf
db|scanwave.(12).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
generator_accb.vhd
cb2f8a9b4fa39533308d0d1e71edcc3
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
generator_accB:inst4
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
FREDEVIDER8
# storage
db|scanwave.(13).cnf
db|scanwave.(13).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fredevider8.vhd
8db25fdedbfed72a8467bb1eebe1a6ef
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
FREDEVIDER8:inst8
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
bustri
# storage
db|scanwave.(14).cnf
db|scanwave.(14).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
BUSTRI.vhd
3a7e8b56258749cd0a12991fcc52ca2
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
bustri:inst1
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
lpm_bustri
# storage
db|scanwave.(15).cnf
db|scanwave.(15).cnf
# case_insensitive
# source_file
c:|altera|71|quartus|libraries|megafunctions|lpm_bustri.tdf
513bd48101123c3b33a0bf95d02a6
6
# user_parameter {
LPM_WIDTH
8
PARAMETER_SIGNED_DEC
USR
}
# used_port {
tridata7
-1
3
tridata6
-1
3
tridata5
-1
3
tridata4
-1
3
tridata3
-1
3
tridata2
-1
3
tridata1
-1
3
tridata0
-1
3
result7
-1
3
result6
-1
3
result5
-1
3
result4
-1
3
result3
-1
3
result2
-1
3
result1
-1
3
result0
-1
3
enabletr
-1
3
enabledt
-1
3
data7
-1
3
data6
-1
3
data5
-1
3
data4
-1
3
data3
-1
3
data2
-1
3
data1
-1
3
data0
-1
3
}
# hierarchies {
bustri:inst1|lpm_bustri:lpm_bustri_component
}
# lmf
c:|altera|71|quartus|lmf|
d41d8cd98f0b24e980998ecf8427e
# macro_sequence

# end
# entity
FREQ_COUNT
# storage
db|scanwave.(16).cnf
db|scanwave.(16).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
freq_count.vhd
70e646a7bff89b95eebbe83ebebe16d
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
FREQ_COUNT:inst6
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
FREDEVIDER10
# storage
db|scanwave.(17).cnf
db|scanwave.(17).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
fredevider10.vhd
59d2732ebc71a717a2e61a5cde2f71a4
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
FREDEVIDER10:inst18
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
MUX2_3
# storage
db|scanwave.(18).cnf
db|scanwave.(18).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
MUX2_3.vhd
8e34842694f82dfadf1fac4be82d228a
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
MUX2_3:inst3
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
VOLTAGE_CONV
# storage
db|scanwave.(19).cnf
db|scanwave.(19).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
VOLTAGE_CONV.vhd
96eae2f2df5e2356b89af9c2438cc81
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
VOLTAGE_CONV:inst17
VOLTAGE_CONV:inst9
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# entity
MUX2_1
# storage
db|scanwave.(20).cnf
db|scanwave.(20).cnf
# logic_option {
AUTO_RAM_RECOGNITION
ON
}
# case_insensitive
# source_file
MUX2_1.vhd
13402c56fff298c77cbab2ef9cf26259
4
# internal_option {
HDL_INITIAL_FANOUT_LIMIT
OFF
AUTO_RESOURCE_SHARING
OFF
AUTO_RAM_RECOGNITION
ON
AUTO_ROM_RECOGNITION
ON
}
# hierarchies {
MUX2_1:inst32
}
# lmf
c:|altera|71|quartus|lmf|maxplus2.lmf
9a59d39b0706640b4b2718e8a1ff1f
# macro_sequence

# end
# complete