scanwave.tan.summary

数字示波器的FPGA实现 VHDL编写 Quartus7.1测试通过

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Timing Analyzer Summary
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Type           : Worst-case tsu
Slack          : N/A
Required Time  : None
Actual Time    : 11.499 ns
From           : WR
To             : BUS_1:inst5|RAMTMP5[4]
From Clock     : --
To Clock       : CLK
Failed Paths   : 0

Type           : Worst-case tco
Slack          : N/A
Required Time  : None
Actual Time    : 17.376 ns
From           : generator_accB:inst4|TEMP
To             : DAYOUT[1]
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Worst-case th
Slack          : N/A
Required Time  : None
Actual Time    : -0.900 ns
From           : P0[7]
To             : BUS_1:inst5|LATCH_ADDRES[7]
From Clock     : --
To Clock       : ALE
Failed Paths   : 0

Type           : Worst-case Minimum tco
Slack          : N/A
Required Time  : None
Actual Time    : 6.795 ns
From           : BUS_1:inst5|P0_OUT[7]
To             : P0[7]
From Clock     : CLK
To Clock       : --
Failed Paths   : 0

Type           : Clock Setup: 'CLK'
Slack          : N/A
Required Time  : None
Actual Time    : 56.09 MHz ( period = 17.828 ns )
From           : GET_RDADDR:inst10|COUNTER[7]
To             : dram:inst|altsyncram:altsyncram_component|altsyncram_fbg1:auto_generated|ram_block1a5~portb_address_reg7
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 0

Type           : Clock Setup: 'CLK2'
Slack          : N/A
Required Time  : None
Actual Time    : Restricted to 275.03 MHz ( period = 3.636 ns )
From           : FREQ_COUNT:inst6|COUNT2[4]
To             : FREQ_COUNT:inst6|COUNT2[13]
From Clock     : CLK2
To Clock       : CLK2
Failed Paths   : 0

Type           : Clock Hold: 'CLK'
Slack          : Not operational: Clock Skew > Data Delay
Required Time  : None
Actual Time    : N/A
From           : BUS_1:inst5|RAMTMP5[7]
To             : VOLTAGE_CONV:inst17|TEMP[7]
From Clock     : CLK
To Clock       : CLK
Failed Paths   : 521

Type           : Total number of failed paths
Slack          : 
Required Time  : 
Actual Time    : 
From           : 
To             : 
From Clock     : 
To Clock       : 
Failed Paths   : 521

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