dianzirili.map.smsg

来自「用verilog实现的电子日历程序,在Quartus II上编译通过并成功实现」· SMSG 代码 · 共 8 行

Warning (10268): Verilog HDL information at dianzirili.v(126): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at dianzirili.v(143): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at dianzirili.v(157): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at dianzirili.v(171): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at dianzirili.v(204): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at dianzirili.v(218): Always Construct contains both blocking and non-blocking assignments
Warning (10268): Verilog HDL information at dianzirili.v(230): Always Construct contains both blocking and non-blocking assignments