📄 clock.rpt
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cpldfit: version E.33 Xilinx Inc.
Fitter Report
Design Name: clock Date: 11-18-2002, 6:47PM
Device Used: XC95108-7-PC84
Fitting Status: Successful
**************************** Resource Summary ****************************
Macrocells Product Terms Registers Pins Function Block
Used Used Used Used Inputs Used
54 /108 ( 50%) 201 /540 ( 37%) 41 /108 ( 37%) 15 /69 ( 21%) 85 /216 ( 39%)
PIN RESOURCES:
Signal Type Required Mapped | Pin Type Used Remaining
------------------------------------|---------------------------------------
Input : 2 2 | I/O : 14 49
Output : 12 12 | GCK/IO : 1 2
Bidirectional : 0 0 | GTS/IO : 0 2
GCK : 1 1 | GSR/IO : 0 1
GTS : 0 0 |
GSR : 0 0 |
---- ----
Total 15 15
MACROCELL RESOURCES:
Total Macrocells Available 108
Registered Macrocells 41
Non-registered Macrocell driving I/O 12
GLOBAL RESOURCES:
The complement of 'clk' mapped onto global clock net GCK1.
Global output enable net(s) unused.
Global set/reset net(s) unused.
POWER DATA:
There are 54 macrocells in high performance mode (MCHP).
There are 0 macrocells in low power mode (MCLP).
There are a total of 54 macrocells used (MC).
End of Resource Summary
**************************** Errors and Warnings *************************
WARNING:Cpld - Unable to map all desired signals into function block, FB6,
because too many function block product terms are required. Buffering output
signal lddat<5> to allow all signals assigned to this function block to be
placed.
***************Resources Used by Successfully Mapped Logic******************
** LOGIC **
Signal Total Signals Loc Pwr Slew Pin Pin Pin
Name Pt Used Mode Rate # Type Use
count_0 1 1 FB2_14 STD 81 I/O (b)
count_1 2 23 FB1_18 STD (b) (b)
count_10 1 10 FB2_13 STD (b) (b)
count_11 1 11 FB2_12 STD 80 I/O (b)
count_12 1 12 FB1_9 STD 6 I/O (b)
count_13 2 23 FB1_17 STD 13 I/O (b)
count_14 2 23 FB1_16 STD 12 GCK/I/O (b)
count_15 1 15 FB1_8 STD 5 I/O (b)
count_16 1 16 FB1_7 STD (b) (b)
count_17 1 17 FB1_6 STD 4 I/O (b)
count_18 2 23 FB1_15 STD 11 I/O (b)
count_19 1 19 FB1_5 STD 3 I/O (b)
count_2 2 23 FB1_14 STD 10 GCK/I/O (b)
count_20 2 23 FB1_13 STD (b) (b)
count_21 1 21 FB1_4 STD (b) (b)
count_22 2 23 FB1_12 STD 9 GCK/I/O GCK
count_3 2 23 FB1_11 STD 7 I/O (b)
count_4 2 23 FB1_10 STD (b) (b)
count_5 1 5 FB2_11 STD 79 I/O (b)
count_6 1 6 FB2_10 STD (b) (b)
count_7 1 7 FB2_9 STD 77 GTS/I/O (b)
count_8 1 8 FB2_8 STD 76 GTS/I/O (b)
count_9 1 9 FB2_7 STD (b) (b)
keyen_reg 2 3 FB2_17 STD 84 I/O (b)
lddat<0> 16 18 FB5_12 STD FAST 40 I/O O
lddat<1> 16 18 FB5_14 STD FAST 41 I/O O
lddat<2> 12 18 FB5_15 STD FAST 43 I/O O
lddat<3> 16 18 FB5_17 STD FAST 44 I/O O
lddat<4> 12 18 FB6_2 STD FAST 45 I/O O
lddat<5> 1 1 FB6_3 STD FAST 46 I/O O
lddat<5>_BUFR.MC 16 18 FB6_13 STD (b) (b)
lddat<6> 12 18 FB6_5 STD FAST 47 I/O O
lddat<7> 1 3 FB6_6 STD FAST 48 I/O O
ldsel<0> 1 2 FB6_8 STD FAST 50 I/O O
ldsel<1> 1 2 FB6_9 STD FAST 51 I/O O
ldsel<2> 1 2 FB6_11 STD FAST 52 I/O O
ldsel<3> 1 2 FB6_12 STD FAST 53 I/O O
min_0 3 4 FB2_16 STD 83 I/O (b)
min_1 5 7 FB2_18 STD (b) (b)
min_10 3 14 FB6_16 STD (b) (b)
min_11 4 15 FB6_10 STD (b) (b)
min_12 3 16 FB6_17 STD 56 I/O (b)
min_13 5 19 FB6_4 STD (b) (b)
min_14 4 19 FB6_15 STD 55 I/O I
min_15 3 19 FB6_18 STD (b) (b)
min_2 3 6 FB2_15 STD 82 I/O (b)
min_3 4 7 FB5_8 STD 36 I/O (b)
min_4 3 8 FB5_5 STD 34 I/O (b)
min_5 5 11 FB5_7 STD (b) (b)
min_6 4 11 FB5_6 STD 35 I/O (b)
min_7 3 11 FB5_3 STD 33 I/O (b)
min_8 3 12 FB5_4 STD (b) (b)
min_9 5 15 FB6_7 STD (b) (b)
sec 1 23 FB1_3 STD 2 I/O (b)
** INPUTS **
Signal Loc Pin Pin Pin
Name # Type Use
clk FB1_12 9 GCK/I/O GCK
keyclr FB6_14 54 I/O I
keyen FB6_15 55 I/O I
End of Resources Used by Successfully Mapped Logic
*********************Function Block Resource Summary***********************
Function # of FB Inputs Signals Total O/IO IO
Block Macrocells Used Used Pt Used Req Avail
FB1 16 23 23 25 0/0 12
FB2 12 19 19 21 0/0 12
FB3 0 0 0 0 0/0 12
FB4 0 0 0 0 0/0 11
FB5 10 21 21 82 4/0 11
FB6 16 22 22 73 8/0 11
---- ----- ----- -----
54 201 12/0 69
*********************************** FB1 ***********************************
Number of function block inputs used/remaining: 23/13
Number of signals used by logic mapping into function block: 23
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB1_1 (b)
(unused) 0 0 0 5 FB1_2 1 I/O
sec 1 0 0 4 FB1_3 STD 2 I/O (b)
count_21 1 0 0 4 FB1_4 STD (b) (b)
count_19 1 0 0 4 FB1_5 STD 3 I/O (b)
count_17 1 0 0 4 FB1_6 STD 4 I/O (b)
count_16 1 0 0 4 FB1_7 STD (b) (b)
count_15 1 0 0 4 FB1_8 STD 5 I/O (b)
count_12 1 0 0 4 FB1_9 STD 6 I/O (b)
count_4 2 0 0 3 FB1_10 STD (b) (b)
count_3 2 0 0 3 FB1_11 STD 7 I/O (b)
count_22 2 0 0 3 FB1_12 STD 9 GCK/I/O GCK
count_20 2 0 0 3 FB1_13 STD (b) (b)
count_2 2 0 0 3 FB1_14 STD 10 GCK/I/O (b)
count_18 2 0 0 3 FB1_15 STD 11 I/O (b)
count_14 2 0 0 3 FB1_16 STD 12 GCK/I/O (b)
count_13 2 0 0 3 FB1_17 STD 13 I/O (b)
count_1 2 0 0 3 FB1_18 STD (b) (b)
Signals Used by Logic in Function Block
1: count_0 9: count_16.FBK.LFBK 17: count_3.FBK.LFBK
2: count_1.FBK.LFBK 10: count_17.FBK.LFBK 18: count_4.FBK.LFBK
3: count_10 11: count_18.FBK.LFBK 19: count_5
4: count_11 12: count_19.FBK.LFBK 20: count_6
5: count_12.FBK.LFBK 13: count_2.FBK.LFBK 21: count_7
6: count_13.FBK.LFBK 14: count_20.FBK.LFBK 22: count_8
7: count_14.FBK.LFBK 15: count_21.FBK.LFBK 23: count_9
8: count_15.FBK.LFBK 16: count_22.FBK.LFBK
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
sec XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_21 XXXXXXXXXXXXXX..XXXXXXX................. 21 21
count_19 XXXXXXXXXXX.X...XXXXXXX................. 19 19
count_17 XXXXXXXXX...X...XXXXXXX................. 17 17
count_16 XXXXXXXX....X...XXXXXXX................. 16 16
count_15 XXXXXXX.....X...XXXXXXX................. 15 15
count_12 XXXX........X...XXXXXXX................. 12 12
count_4 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_3 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_22 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_20 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_2 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_18 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_14 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_13 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
count_1 XXXXXXXXXXXXXXXXXXXXXXX................. 23 23
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB2 ***********************************
Number of function block inputs used/remaining: 19/17
Number of signals used by logic mapping into function block: 19
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB2_1 (b)
(unused) 0 0 0 5 FB2_2 71 I/O
(unused) 0 0 0 5 FB2_3 72 I/O
(unused) 0 0 0 5 FB2_4 (b)
(unused) 0 0 0 5 FB2_5 74 GSR/I/O
(unused) 0 0 0 5 FB2_6 75 I/O
count_9 1 0 0 4 FB2_7 STD (b) (b)
count_8 1 0 0 4 FB2_8 STD 76 GTS/I/O (b)
count_7 1 0 0 4 FB2_9 STD 77 GTS/I/O (b)
count_6 1 0 0 4 FB2_10 STD (b) (b)
count_5 1 0 0 4 FB2_11 STD 79 I/O (b)
count_11 1 0 0 4 FB2_12 STD 80 I/O (b)
count_10 1 0 0 4 FB2_13 STD (b) (b)
count_0 1 0 0 4 FB2_14 STD 81 I/O (b)
min_2 3 0 0 2 FB2_15 STD 82 I/O (b)
min_0 3 0 0 2 FB2_16 STD 83 I/O (b)
keyen_reg 2 0 0 3 FB2_17 STD 84 I/O (b)
min_1 5 0 0 0 FB2_18 STD (b) (b)
Signals Used by Logic in Function Block
1: keyen 8: count_4 14: keyen_reg.FBK.LFBK
2: keyclr 9: count_5.FBK.LFBK 15: min_0.FBK.LFBK
3: count_0.FBK.LFBK 10: count_6.FBK.LFBK 16: min_1.FBK.LFBK
4: count_1 11: count_7.FBK.LFBK 17: min_2.FBK.LFBK
5: count_10.FBK.LFBK 12: count_8.FBK.LFBK 18: min_3
6: count_2 13: count_9.FBK.LFBK 19: sec
7: count_3
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
count_9 ..XX.XXXXXXX............................ 9 9
count_8 ..XX.XXXXXX............................. 8 8
count_7 ..XX.XXXXX.............................. 7 7
count_6 ..XX.XXXX............................... 6 6
count_5 ..XX.XXX................................ 5 5
count_11 ..XXXXXXXXXXX........................... 11 11
count_10 ..XX.XXXXXXXX........................... 10 10
count_0 ..X..................................... 1 1
min_2 .X...........XXXX.X..................... 6 6
min_0 .X...........XX...X..................... 4 4
keyen_reg X............X....X..................... 3 3
min_1 .X...........XXXXXX..................... 7 7
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK/FCLK - Global clock
O - Output GTS/FOE - Global 3state/output-enable
(b) - Buried macrocell
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB3 ***********************************
Number of function block inputs used/remaining: 0/36
Number of signals used by logic mapping into function block: 0
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB3_1 (b)
(unused) 0 0 0 5 FB3_2 14 I/O
(unused) 0 0 0 5 FB3_3 15 I/O
(unused) 0 0 0 5 FB3_4 (b)
(unused) 0 0 0 5 FB3_5 17 I/O
(unused) 0 0 0 5 FB3_6 18 I/O
(unused) 0 0 0 5 FB3_7 (b)
(unused) 0 0 0 5 FB3_8 19 I/O
(unused) 0 0 0 5 FB3_9 20 I/O
(unused) 0 0 0 5 FB3_10 (b)
(unused) 0 0 0 5 FB3_11 21 I/O
(unused) 0 0 0 5 FB3_12 23 I/O
(unused) 0 0 0 5 FB3_13 (b)
(unused) 0 0 0 5 FB3_14 24 I/O
(unused) 0 0 0 5 FB3_15 25 I/O
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