clock.map.qmsg

功能更加完善的基于vhdl的数字时钟设计 有秒表

{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "cmin clock.vhd(82) " "Warning (10492): VHDL Process Statement warning at clock.vhd(82): signal \"cmin\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 82 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "chour clock.vhd(82) " "Warning (10492): VHDL Process Statement warning at clock.vhd(82): signal \"chour\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 82 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s17 clock.vhd(83) " "Warning (10492): VHDL Process Statement warning at clock.vhd(83): signal \"s17\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 83 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s18 clock.vhd(84) " "Warning (10492): VHDL Process Statement warning at clock.vhd(84): signal \"s18\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 84 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s19 clock.vhd(85) " "Warning (10492): VHDL Process Statement warning at clock.vhd(85): signal \"s19\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 85 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s20 clock.vhd(86) " "Warning (10492): VHDL Process Statement warning at clock.vhd(86): signal \"s20\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 86 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "cmin clock.vhd(89) " "Warning (10492): VHDL Process Statement warning at clock.vhd(89): signal \"cmin\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 89 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "chour clock.vhd(90) " "Warning (10492): VHDL Process Statement warning at clock.vhd(90): signal \"chour\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 90 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s13 clock.vhd(93) " "Warning (10492): VHDL Process Statement warning at clock.vhd(93): signal \"s13\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 93 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s14 clock.vhd(94) " "Warning (10492): VHDL Process Statement warning at clock.vhd(94): signal \"s14\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 94 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s15 clock.vhd(97) " "Warning (10492): VHDL Process Statement warning at clock.vhd(97): signal \"s15\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 97 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s16 clock.vhd(98) " "Warning (10492): VHDL Process Statement warning at clock.vhd(98): signal \"s16\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 98 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s7 clock.vhd(103) " "Warning (10492): VHDL Process Statement warning at clock.vhd(103): signal \"s7\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 103 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s8 clock.vhd(104) " "Warning (10492): VHDL Process Statement warning at clock.vhd(104): signal \"s8\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 104 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s9 clock.vhd(105) " "Warning (10492): VHDL Process Statement warning at clock.vhd(105): signal \"s9\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 105 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s10 clock.vhd(106) " "Warning (10492): VHDL Process Statement warning at clock.vhd(106): signal \"s10\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 106 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s11 clock.vhd(107) " "Warning (10492): VHDL Process Statement warning at clock.vhd(107): signal \"s11\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 107 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Warning" "WVRFX_VHDL_SHOULD_BE_ON_THE_PROCESSES_SENSITIVITY_LIST" "s12 clock.vhd(108) " "Warning (10492): VHDL Process Statement warning at clock.vhd(108): signal \"s12\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" {  } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 108 0 0 } }  } 0 10492 "VHDL Process Statement warning at %2!s!: signal \"%1!s!\" is read inside the Process Statement but isn't in the Process Statement's sensivitity list" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "trs38 trs38:U1 " "Info: Elaborating entity \"trs38\" for hierarchy \"trs38:U1\"" {  } { { "clock.vhd" "U1" { Text "D:/0zht/C2/clock.vhd" 31 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "second second:U2 " "Info: Elaborating entity \"second\" for hierarchy \"second:U2\"" {  } { { "clock.vhd" "U2" { Text "D:/0zht/C2/clock.vhd" 51 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cnt100 second:U2\|cnt100:u1 " "Info: Elaborating entity \"cnt100\" for hierarchy \"second:U2\|cnt100:u1\"" {  } { { "clock.vhd" "u1" { Text "D:/0zht/C2/clock.vhd" 241 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}
{ "Info" "ISGN_START_ELABORATION_HIERARCHY" "cnt60 second:U2\|cnt60:u2 " "Info: Elaborating entity \"cnt60\" for hierarchy \"second:U2\|cnt60:u2\"" {  } { { "clock.vhd" "u2" { Text "D:/0zht/C2/clock.vhd" 242 -1 0 } }  } 0 0 "Elaborating entity \"%1!s!\" for hierarchy \"%2!s!\"" 0 0}