📄 clock.tan.qmsg
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{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "18 " "Warning: Found 18 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_RIPPLE_CLK" "time:U3\|clkc4 " "Info: Detected ripple clock \"time:U3\|clkc4\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc4" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "time:U3\|clkc5 " "Info: Detected gated clock \"time:U3\|clkc5\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc5" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "scmin~9 " "Info: Detected gated clock \"scmin~9\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 27 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "scmin~9" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "time:U3\|clkc6 " "Info: Detected ripple clock \"time:U3\|clkc6\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc6" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "smon~2 " "Info: Detected gated clock \"smon~2\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 27 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "smon~2" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "time:U3\|clkc7 " "Info: Detected gated clock \"time:U3\|clkc7\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc7" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "time:U3\|clkc2 " "Info: Detected ripple clock \"time:U3\|clkc2\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc2" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "time:U3\|clkc3 " "Info: Detected gated clock \"time:U3\|clkc3\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc3" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "second:U2\|cnt60:u2\|c " "Info: Detected ripple clock \"second:U2\|cnt60:u2\|c\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 305 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "second:U2\|cnt60:u2\|c" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "time:U3\|cnt60co:u1\|c " "Info: Detected ripple clock \"time:U3\|cnt60co:u1\|c\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 471 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|cnt60co:u1\|c" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "process2~80 " "Info: Detected gated clock \"process2~80\" as buffer" { } { { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "process2~80" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "cecl " "Info: Detected gated clock \"cecl\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 27 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "cecl" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "schour~8 " "Info: Detected gated clock \"schour~8\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 27 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "schour~8" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "trs38:U1\|c\[2\] " "Info: Detected ripple clock \"trs38:U1\|c\[2\]\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 131 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "trs38:U1\|c\[2\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "trs38:U1\|c\[0\] " "Info: Detected ripple clock \"trs38:U1\|c\[0\]\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 131 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "trs38:U1\|c\[0\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "trs38:U1\|c\[1\] " "Info: Detected ripple clock \"trs38:U1\|c\[1\]\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 131 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "trs38:U1\|c\[1\]" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "time:U3\|clkc1 " "Info: Detected gated clock \"time:U3\|clkc1\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "time:U3\|clkc1" } } } } } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "second:U2\|cnt100:u1\|c " "Info: Detected ripple clock \"second:U2\|cnt100:u1\|c\" as buffer" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 267 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "second:U2\|cnt100:u1\|c" } } } } } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} } { } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register time:U3\|dy:U4\|s1\[2\] register time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 77.52 MHz 12.9 ns Internal " "Info: Clock \"clk\" has Internal fmax of 77.52 MHz between source register \"time:U3\|dy:U4\|s1\[2\]\" and destination register \"time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]\" (period= 12.9 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.800 ns + Longest register register " "Info: + Longest register to register delay is 11.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns time:U3\|dy:U4\|s1\[2\] 1 REG LC6_B22 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC6_B22; Fanout = 6; REG Node = 'time:U3\|dy:U4\|s1\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "" { time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 539 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 1.900 ns time:U3\|dy:U4\|Equal~239 2 COMB LC5_B22 1 " "Info: 2: + IC(0.300 ns) + CELL(1.600 ns) = 1.900 ns; Loc. = LC5_B22; Fanout = 1; COMB Node = 'time:U3\|dy:U4\|Equal~239'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.900 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.400 ns) 4.300 ns time:U3\|dy:U4\|process0~198 3 COMB LC3_B23 3 " "Info: 3: + IC(1.000 ns) + CELL(1.400 ns) = 4.300 ns; Loc. = LC3_B23; Fanout = 3; COMB Node = 'time:U3\|dy:U4\|process0~198'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "2.400 ns" { time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 6.000 ns time:U3\|dy:U4\|process0~200 4 COMB LC8_B23 2 " "Info: 4: + IC(0.300 ns) + CELL(1.400 ns) = 6.000 ns; Loc. = LC8_B23; Fanout = 2; COMB Node = 'time:U3\|dy:U4\|process0~200'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.700 ns" { time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.700 ns) 8.000 ns time:U3\|dy:U4\|s2~144 5 COMB LC2_B23 1 " "Info: 5: + IC(0.300 ns) + CELL(1.700 ns) = 8.000 ns; Loc. = LC2_B23; Fanout = 1; COMB Node = 'time:U3\|dy:U4\|s2~144'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "2.000 ns" { time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 534 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(1.600 ns) 10.500 ns time:U3\|dy:U4\|s2~146 6 COMB LC7_B24 7 " "Info: 6: + IC(0.900 ns) + CELL(1.600 ns) = 10.500 ns; Loc. = LC7_B24; Fanout = 7; COMB Node = 'time:U3\|dy:U4\|s2~146'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "2.500 ns" { time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 534 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.000 ns) 11.800 ns time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 7 REG LC6_B24 3 " "Info: 7: + IC(0.300 ns) + CELL(1.000 ns) = 11.800 ns; Loc. = LC6_B24; Fanout = 3; REG Node = 'time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.300 ns" { time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.700 ns ( 73.73 % ) " "Info: Total cell delay = 8.700 ns ( 73.73 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.100 ns ( 26.27 % ) " "Info: Total interconnect delay = 3.100 ns ( 26.27 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.300ns 1.000ns 0.300ns 0.300ns 0.900ns 0.300ns } { 0.000ns 1.600ns 1.400ns 1.400ns 1.700ns 1.600ns 1.000ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 5.800 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 5.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns clk 1 CLK PIN_55 22 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 22; CLK Node = 'clk'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "" { clk } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns time:U3\|clkc4 2 REG LC7_B21 1 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC7_B21; Fanout = 1; REG Node = 'time:U3\|clkc4'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "0.900 ns" { clk time:U3|clkc4 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 4.600 ns time:U3\|clkc5 3 COMB LC2_B21 12 " "Info: 3: + IC(0.300 ns) + CELL(1.400 ns) = 4.600 ns; Loc. = LC2_B21; Fanout = 12; COMB Node = 'time:U3\|clkc5'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.700 ns" { time:U3|clkc4 time:U3|clkc5 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(0.000 ns) 5.800 ns time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 4 REG LC6_B24 3 " "Info: 4: + IC(1.200 ns) + CELL(0.000 ns) = 5.800 ns; Loc. = LC6_B24; Fanout = 3; REG Node = 'time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.200 ns" { time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.900 ns ( 67.24 % ) " "Info: Total cell delay = 3.900 ns ( 67.24 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.900 ns ( 32.76 % ) " "Info: Total interconnect delay = 1.900 ns ( 32.76 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "5.800 ns" { clk time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { clk clk~out time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 5.800 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 5.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns clk 1 CLK PIN_55 22 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_55; Fanout = 22; CLK Node = 'clk'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "" { clk } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns time:U3\|clkc4 2 REG LC7_B21 1 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC7_B21; Fanout = 1; REG Node = 'time:U3\|clkc4'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "0.900 ns" { clk time:U3|clkc4 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 4.600 ns time:U3\|clkc5 3 COMB LC2_B21 12 " "Info: 3: + IC(0.300 ns) + CELL(1.400 ns) = 4.600 ns; Loc. = LC2_B21; Fanout = 12; COMB Node = 'time:U3\|clkc5'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.700 ns" { time:U3|clkc4 time:U3|clkc5 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(0.000 ns) 5.800 ns time:U3\|dy:U4\|s1\[2\] 4 REG LC6_B22 6 " "Info: 4: + IC(1.200 ns) + CELL(0.000 ns) = 5.800 ns; Loc. = LC6_B22; Fanout = 6; REG Node = 'time:U3\|dy:U4\|s1\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.200 ns" { time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 539 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.900 ns ( 67.24 % ) " "Info: Total cell delay = 3.900 ns ( 67.24 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.900 ns ( 32.76 % ) " "Info: Total interconnect delay = 1.900 ns ( 32.76 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "5.800 ns" { clk time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { clk clk~out time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|s1[2] } { 0.000ns 0.000ns 0.400ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "5.800 ns" { clk time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { clk clk~out time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "5.800 ns" { clk time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { clk clk~out time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|s1[2] } { 0.000ns 0.000ns 0.400ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 539 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.300ns 1.000ns 0.300ns 0.300ns 0.900ns 0.300ns } { 0.000ns 1.600ns 1.400ns 1.400ns 1.700ns 1.600ns 1.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "5.800 ns" { clk time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { clk clk~out time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "5.800 ns" { clk time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.800 ns" { clk clk~out time:U3|clkc4 time:U3|clkc5 time:U3|dy:U4|s1[2] } { 0.000ns 0.000ns 0.400ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.400ns 0.000ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "set register time:U3\|dy:U4\|s1\[2\] register time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 67.57 MHz 14.8 ns Internal " "Info: Clock \"set\" has Internal fmax of 67.57 MHz between source register \"time:U3\|dy:U4\|s1\[2\]\" and destination register \"time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]\" (period= 14.8 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "11.800 ns + Longest register register " "Info: + Longest register to register delay is 11.800 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns time:U3\|dy:U4\|s1\[2\] 1 REG LC6_B22 6 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC6_B22; Fanout = 6; REG Node = 'time:U3\|dy:U4\|s1\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "" { time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 539 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 1.900 ns time:U3\|dy:U4\|Equal~239 2 COMB LC5_B22 1 " "Info: 2: + IC(0.300 ns) + CELL(1.600 ns) = 1.900 ns; Loc. = LC5_B22; Fanout = 1; COMB Node = 'time:U3\|dy:U4\|Equal~239'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.900 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.000 ns) + CELL(1.400 ns) 4.300 ns time:U3\|dy:U4\|process0~198 3 COMB LC3_B23 3 " "Info: 3: + IC(1.000 ns) + CELL(1.400 ns) = 4.300 ns; Loc. = LC3_B23; Fanout = 3; COMB Node = 'time:U3\|dy:U4\|process0~198'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "2.400 ns" { time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.400 ns) 6.000 ns time:U3\|dy:U4\|process0~200 4 COMB LC8_B23 2 " "Info: 4: + IC(0.300 ns) + CELL(1.400 ns) = 6.000 ns; Loc. = LC8_B23; Fanout = 2; COMB Node = 'time:U3\|dy:U4\|process0~200'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.700 ns" { time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 } "NODE_NAME" } "" } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.700 ns) 8.000 ns time:U3\|dy:U4\|s2~144 5 COMB LC2_B23 1 " "Info: 5: + IC(0.300 ns) + CELL(1.700 ns) = 8.000 ns; Loc. = LC2_B23; Fanout = 1; COMB Node = 'time:U3\|dy:U4\|s2~144'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "2.000 ns" { time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 534 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.900 ns) + CELL(1.600 ns) 10.500 ns time:U3\|dy:U4\|s2~146 6 COMB LC7_B24 7 " "Info: 6: + IC(0.900 ns) + CELL(1.600 ns) = 10.500 ns; Loc. = LC7_B24; Fanout = 7; COMB Node = 'time:U3\|dy:U4\|s2~146'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "2.500 ns" { time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 534 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.000 ns) 11.800 ns time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 7 REG LC6_B24 3 " "Info: 7: + IC(0.300 ns) + CELL(1.000 ns) = 11.800 ns; Loc. = LC6_B24; Fanout = 3; REG Node = 'time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.300 ns" { time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.700 ns ( 73.73 % ) " "Info: Total cell delay = 8.700 ns ( 73.73 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.100 ns ( 26.27 % ) " "Info: Total interconnect delay = 3.100 ns ( 26.27 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.300ns 1.000ns 0.300ns 0.300ns 0.900ns 0.300ns } { 0.000ns 1.600ns 1.400ns 1.400ns 1.700ns 1.600ns 1.000ns } } } } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "-1.900 ns - Smallest " "Info: - Smallest clock skew is -1.900 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "set destination 7.400 ns + Shortest register " "Info: + Shortest clock path from clock \"set\" to destination register is 7.400 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns set 1 CLK PIN_125 3 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_125; Fanout = 3; CLK Node = 'set'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "" { set } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns trs38:U1\|c\[0\] 2 REG LC2_B10 19 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC2_B10; Fanout = 19; REG Node = 'trs38:U1\|c\[0\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "0.900 ns" { set trs38:U1|c[0] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 131 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.600 ns) + CELL(1.700 ns) 6.200 ns time:U3\|clkc5 3 COMB LC2_B21 12 " "Info: 3: + IC(1.600 ns) + CELL(1.700 ns) = 6.200 ns; Loc. = LC2_B21; Fanout = 12; COMB Node = 'time:U3\|clkc5'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "3.300 ns" { trs38:U1|c[0] time:U3|clkc5 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(0.000 ns) 7.400 ns time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\] 4 REG LC6_B24 3 " "Info: 4: + IC(1.200 ns) + CELL(0.000 ns) = 7.400 ns; Loc. = LC6_B24; Fanout = 3; REG Node = 'time:U3\|dy:U4\|lpm_counter:s2_rtl_0\|alt_counter_f10ke:wysi_counter\|q\[3\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.200 ns" { time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "4.200 ns ( 56.76 % ) " "Info: Total cell delay = 4.200 ns ( 56.76 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.200 ns ( 43.24 % ) " "Info: Total interconnect delay = 3.200 ns ( 43.24 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "7.400 ns" { set trs38:U1|c[0] time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "7.400 ns" { set set~out trs38:U1|c[0] time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.700ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "set source 9.300 ns - Longest register " "Info: - Longest clock path from clock \"set\" to source register is 9.300 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns set 1 CLK PIN_125 3 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_125; Fanout = 3; CLK Node = 'set'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "" { set } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 5 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.400 ns) + CELL(0.500 ns) 2.900 ns trs38:U1\|c\[2\] 2 REG LC5_B8 15 " "Info: 2: + IC(0.400 ns) + CELL(0.500 ns) = 2.900 ns; Loc. = LC5_B8; Fanout = 15; REG Node = 'trs38:U1\|c\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "0.900 ns" { set trs38:U1|c[2] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 131 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.700 ns) + CELL(1.600 ns) 6.200 ns smon~2 3 COMB LC5_B21 3 " "Info: 3: + IC(1.700 ns) + CELL(1.600 ns) = 6.200 ns; Loc. = LC5_B21; Fanout = 3; COMB Node = 'smon~2'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "3.300 ns" { trs38:U1|c[2] smon~2 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 27 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.300 ns) + CELL(1.600 ns) 8.100 ns time:U3\|clkc5 4 COMB LC2_B21 12 " "Info: 4: + IC(0.300 ns) + CELL(1.600 ns) = 8.100 ns; Loc. = LC2_B21; Fanout = 12; COMB Node = 'time:U3\|clkc5'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.900 ns" { smon~2 time:U3|clkc5 } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 398 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.200 ns) + CELL(0.000 ns) 9.300 ns time:U3\|dy:U4\|s1\[2\] 5 REG LC6_B22 6 " "Info: 5: + IC(1.200 ns) + CELL(0.000 ns) = 9.300 ns; Loc. = LC6_B22; Fanout = 6; REG Node = 'time:U3\|dy:U4\|s1\[2\]'" { } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "1.200 ns" { time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 539 -1 0 } } } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "5.700 ns ( 61.29 % ) " "Info: Total cell delay = 5.700 ns ( 61.29 % )" { } { } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.600 ns ( 38.71 % ) " "Info: Total interconnect delay = 3.600 ns ( 38.71 % )" { } { } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "9.300 ns" { set trs38:U1|c[2] smon~2 time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.300 ns" { set set~out trs38:U1|c[2] smon~2 time:U3|clkc5 time:U3|dy:U4|s1[2] } { 0.000ns 0.000ns 0.400ns 1.700ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.600ns 0.000ns } } } } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "7.400 ns" { set trs38:U1|c[0] time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "7.400 ns" { set set~out trs38:U1|c[0] time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.700ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "9.300 ns" { set trs38:U1|c[2] smon~2 time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.300 ns" { set set~out trs38:U1|c[2] smon~2 time:U3|clkc5 time:U3|dy:U4|s1[2] } { 0.000ns 0.000ns 0.400ns 1.700ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.600ns 0.000ns } } } } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.500 ns + " "Info: + Micro clock to output delay of source is 0.500 ns" { } { { "clock.vhd" "" { Text "D:/0zht/C2/clock.vhd" 539 -1 0 } } } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.600 ns + " "Info: + Micro setup delay of destination is 0.600 ns" { } { { "alt_counter_f10ke.tdf" "" { Text "c:/altera/quartus51/libraries/megafunctions/alt_counter_f10ke.tdf" 271 2 0 } } } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "11.800 ns" { time:U3|dy:U4|s1[2] time:U3|dy:U4|Equal~239 time:U3|dy:U4|process0~198 time:U3|dy:U4|process0~200 time:U3|dy:U4|s2~144 time:U3|dy:U4|s2~146 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.300ns 1.000ns 0.300ns 0.300ns 0.900ns 0.300ns } { 0.000ns 1.600ns 1.400ns 1.400ns 1.700ns 1.600ns 1.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "7.400 ns" { set trs38:U1|c[0] time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "7.400 ns" { set set~out trs38:U1|c[0] time:U3|clkc5 time:U3|dy:U4|lpm_counter:s2_rtl_0|alt_counter_f10ke:wysi_counter|q[3] } { 0.000ns 0.000ns 0.400ns 1.600ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.700ns 0.000ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "clock" "UNKNOWN" "V1" "D:/0zht/C2/db/clock.quartus_db" { Floorplan "D:/0zht/C2/" "" "9.300 ns" { set trs38:U1|c[2] smon~2 time:U3|clkc5 time:U3|dy:U4|s1[2] } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.300 ns" { set set~out trs38:U1|c[2] smon~2 time:U3|clkc5 time:U3|dy:U4|s1[2] } { 0.000ns 0.000ns 0.400ns 1.700ns 0.300ns 1.200ns } { 0.000ns 2.000ns 0.500ns 1.600ns 1.600ns 0.000ns } } } } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
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