clock_modelsim.xrf

功能更加完善的基于vhdl的数字时钟设计 有秒表

instance = comp, \U3|U4|process0~199_I\, U3|U4|process0~199, clock, 1
instance = comp, \U3|U4|s1~815_I\, U3|U4|s1~815, clock, 1
instance = comp, \U3|U4|s1[1]~I\, U3|U4|s1[1], clock, 1
instance = comp, \co1~1404_I\, co1~1404, clock, 1
instance = comp, \U4|U1|s1[2]~I\, U4|U1|s1[2], clock, 1
instance = comp, \U4|U1|s1[3]~I\, U4|U1|s1[3], clock, 1
instance = comp, \U4|U1|s1[1]~I\, U4|U1|s1[1], clock, 1
instance = comp, \co1~1403_I\, co1~1403, clock, 1
instance = comp, \co1~1413_I\, co1~1413, clock, 1
instance = comp, \co1~1407_I\, co1~1407, clock, 1
instance = comp, \co1~1406_I\, co1~1406, clock, 1
instance = comp, \co1~1414_I\, co1~1414, clock, 1
instance = comp, \co1~1410_I\, co1~1410, clock, 1
instance = comp, \co1~1409_I\, co1~1409, clock, 1
instance = comp, \co1~1415_I\, co1~1415, clock, 1
instance = comp, \U2|u1|add_rtl_3|adder|result_node|cs_buffer[0]~I\, U2|u1|add_rtl_3|adder|result_node|cs_buffer[0], clock, 1
instance = comp, \U2|u1|s2[0]~I\, U2|u1|s2[0], clock, 1
instance = comp, \co2~1341_I\, co2~1341, clock, 1
instance = comp, \U4|U1|add_rtl_5|adder|result_node|cs_buffer[0]~I\, U4|U1|add_rtl_5|adder|result_node|cs_buffer[0], clock, 1
instance = comp, \U4|U1|s2[0]~I\, U4|U1|s2[0], clock, 1
instance = comp, \co2~1340_I\, co2~1340, clock, 1
instance = comp, \co2~1352_I\, co2~1352, clock, 1
instance = comp, \U2|u1|add_rtl_3|adder|result_node|cs_buffer[1]~I\, U2|u1|add_rtl_3|adder|result_node|cs_buffer[1], clock, 1
instance = comp, \U2|u1|add_rtl_3|adder|result_node|cs_buffer[2]~I\, U2|u1|add_rtl_3|adder|result_node|cs_buffer[2], clock, 1
instance = comp, \U2|u1|s2[2]~I\, U2|u1|s2[2], clock, 1
instance = comp, \U2|u1|add_rtl_3|adder|unreg_res_node[3]~I\, U2|u1|add_rtl_3|adder|unreg_res_node[3], clock, 1
instance = comp, \U2|u1|s2[3]~I\, U2|u1|s2[3], clock, 1
instance = comp, \U2|u1|process0~24_I\, U2|u1|process0~24, clock, 1
instance = comp, \U2|u1|process0~0_I\, U2|u1|process0~0, clock, 1
instance = comp, \U2|u1|s2[1]~I\, U2|u1|s2[1], clock, 1
instance = comp, \co2~1344_I\, co2~1344, clock, 1
instance = comp, \U4|U1|Equal~40_I\, U4|U1|Equal~40, clock, 1
instance = comp, \U4|U1|add_rtl_5|adder|result_node|cs_buffer[1]~I\, U4|U1|add_rtl_5|adder|result_node|cs_buffer[1], clock, 1
instance = comp, \U4|U1|s2[1]~I\, U4|U1|s2[1], clock, 1
instance = comp, \co2~1343_I\, co2~1343, clock, 1
instance = comp, \co2~1353_I\, co2~1353, clock, 1
instance = comp, \co2~1347_I\, co2~1347, clock, 1
instance = comp, \U4|U1|add_rtl_5|adder|result_node|cs_buffer[2]~I\, U4|U1|add_rtl_5|adder|result_node|cs_buffer[2], clock, 1
instance = comp, \U4|U1|s2[2]~I\, U4|U1|s2[2], clock, 1
instance = comp, \co2~1346_I\, co2~1346, clock, 1
instance = comp, \co2~1354_I\, co2~1354, clock, 1
instance = comp, \co2~1350_I\, co2~1350, clock, 1
instance = comp, \U4|U1|add_rtl_5|adder|unreg_res_node[3]~I\, U4|U1|add_rtl_5|adder|unreg_res_node[3], clock, 1
instance = comp, \U4|U1|s2[3]~I\, U4|U1|s2[3], clock, 1
instance = comp, \co2~1349_I\, co2~1349, clock, 1
instance = comp, \co2~1355_I\, co2~1355, clock, 1
instance = comp, \schour~8_I\, schour~8, clock, 1
instance = comp, \U4|U2|s1_rtl_1|wysi_counter|counter_cell[0]\, U4|U2|s1_rtl_1|wysi_counter|counter_cell[0], clock, 1
instance = comp, \U4|U2|s1_rtl_1|wysi_counter|counter_cell[1]\, U4|U2|s1_rtl_1|wysi_counter|counter_cell[1], clock, 1
instance = comp, \U4|U2|s1_rtl_1|wysi_counter|counter_cell[2]\, U4|U2|s1_rtl_1|wysi_counter|counter_cell[2], clock, 1
instance = comp, \U4|U2|s1_rtl_1|wysi_counter|counter_cell[3]\, U4|U2|s1_rtl_1|wysi_counter|counter_cell[3], clock, 1
instance = comp, \U4|U2|Equal~48_I\, U4|U2|Equal~48, clock, 1
instance = comp, \U4|U2|process0~0_I\, U4|U2|process0~0, clock, 1
instance = comp, \U4|U2|add_rtl_8|adder|result_node|cs_buffer[0]~I\, U4|U2|add_rtl_8|adder|result_node|cs_buffer[0], clock, 1
instance = comp, \U4|U2|s2[0]~I\, U4|U2|s2[0], clock, 1
instance = comp, \U4|U2|add_rtl_8|adder|result_node|cs_buffer[1]~I\, U4|U2|add_rtl_8|adder|result_node|cs_buffer[1], clock, 1
instance = comp, \U4|U2|s2[1]~I\, U4|U2|s2[1], clock, 1
instance = comp, \U4|U2|add_rtl_8|adder|result_node|cs_buffer[2]~I\, U4|U2|add_rtl_8|adder|result_node|cs_buffer[2], clock, 1
instance = comp, \U4|U2|s2[2]~I\, U4|U2|s2[2], clock, 1
instance = comp, \U4|U2|process0~48_I\, U4|U2|process0~48, clock, 1
instance = comp, \U4|U2|s1~27_I\, U4|U2|s1~27, clock, 1
instance = comp, \co3~720_I\, co3~720, clock, 1
instance = comp, \U2|u1|c~I\, U2|u1|c, clock, 1
instance = comp, \U2|u2|s1[0]~I\, U2|u2|s1[0], clock, 1
instance = comp, \co3~721_I\, co3~721, clock, 1
instance = comp, \co3~722_I\, co3~722, clock, 1
instance = comp, \U2|u2|s1[2]~I\, U2|u2|s1[2], clock, 1
instance = comp, \U2|u2|s1~74_I\, U2|u2|s1~74, clock, 1
instance = comp, \U2|u2|s1[3]~I\, U2|u2|s1[3], clock, 1
instance = comp, \U2|u2|Equal~40_I\, U2|u2|Equal~40, clock, 1
instance = comp, \U2|u2|s1[1]~I\, U2|u2|s1[1], clock, 1
instance = comp, \co3~723_I\, co3~723, clock, 1
instance = comp, \co3~724_I\, co3~724, clock, 1
instance = comp, \co3~725_I\, co3~725, clock, 1
instance = comp, \co3~726_I\, co3~726, clock, 1
instance = comp, \co3~727_I\, co3~727, clock, 1
instance = comp, \co3~728_I\, co3~728, clock, 1
instance = comp, \U2|u2|add_rtl_6|adder|result_node|cs_buffer[0]~I\, U2|u2|add_rtl_6|adder|result_node|cs_buffer[0], clock, 1
instance = comp, \U2|u2|s2[0]~I\, U2|u2|s2[0], clock, 1
instance = comp, \co4~716_I\, co4~716, clock, 1
instance = comp, \co4~717_I\, co4~717, clock, 1
instance = comp, \U2|u2|add_rtl_6|adder|result_node|cs_buffer[1]~I\, U2|u2|add_rtl_6|adder|result_node|cs_buffer[1], clock, 1
instance = comp, \U2|u2|add_rtl_6|adder|result_node|cs_buffer[2]~I\, U2|u2|add_rtl_6|adder|result_node|cs_buffer[2], clock, 1
instance = comp, \U2|u2|s2[2]~I\, U2|u2|s2[2], clock, 1
instance = comp, \U2|u2|add_rtl_6|adder|unreg_res_node[3]~I\, U2|u2|add_rtl_6|adder|unreg_res_node[3], clock, 1
instance = comp, \U2|u2|s2[3]~I\, U2|u2|s2[3], clock, 1
instance = comp, \U2|u2|process0~24_I\, U2|u2|process0~24, clock, 1
instance = comp, \U2|u2|process0~0_I\, U2|u2|process0~0, clock, 1
instance = comp, \U2|u2|s2[1]~I\, U2|u2|s2[1], clock, 1
instance = comp, \co4~718_I\, co4~718, clock, 1
instance = comp, \co4~719_I\, co4~719, clock, 1
instance = comp, \co4~720_I\, co4~720, clock, 1
instance = comp, \co4~721_I\, co4~721, clock, 1
instance = comp, \U4|U2|add_rtl_8|adder|unreg_res_node[3]~I\, U4|U2|add_rtl_8|adder|unreg_res_node[3], clock, 1
instance = comp, \U4|U2|s2[3]~I\, U4|U2|s2[3], clock, 1
instance = comp, \co4~722_I\, co4~722, clock, 1
instance = comp, \co4~723_I\, co4~723, clock, 1
instance = comp, \U2|u2|c~I\, U2|u2|c, clock, 1
instance = comp, \U2|u3|s1[0]~I\, U2|u3|s1[0], clock, 1
instance = comp, \co5~670_I\, co5~670, clock, 1
instance = comp, \co5~671_I\, co5~671, clock, 1
instance = comp, \U2|u3|s1[2]~I\, U2|u3|s1[2], clock, 1
instance = comp, \U2|u3|s1~74_I\, U2|u3|s1~74, clock, 1
instance = comp, \U2|u3|s1[3]~I\, U2|u3|s1[3], clock, 1
instance = comp, \U2|u3|Equal~40_I\, U2|u3|Equal~40, clock, 1
instance = comp, \U2|u3|s1[1]~I\, U2|u3|s1[1], clock, 1
instance = comp, \co5~672_I\, co5~672, clock, 1
instance = comp, \co5~673_I\, co5~673, clock, 1
instance = comp, \co5~674_I\, co5~674, clock, 1
instance = comp, \co5~675_I\, co5~675, clock, 1
instance = comp, \co5~676_I\, co5~676, clock, 1
instance = comp, \co5~677_I\, co5~677, clock, 1
instance = comp, \U2|u3|add_rtl_9|adder|result_node|cs_buffer[0]~I\, U2|u3|add_rtl_9|adder|result_node|cs_buffer[0], clock, 1
instance = comp, \U2|u3|s2[0]~I\, U2|u3|s2[0], clock, 1
instance = comp, \co6~668_I\, co6~668, clock, 1
instance = comp, \co6~669_I\, co6~669, clock, 1
instance = comp, \U2|u3|add_rtl_9|adder|result_node|cs_buffer[1]~I\, U2|u3|add_rtl_9|adder|result_node|cs_buffer[1], clock, 1
instance = comp, \U2|u3|add_rtl_9|adder|result_node|cs_buffer[2]~I\, U2|u3|add_rtl_9|adder|result_node|cs_buffer[2], clock, 1
instance = comp, \U2|u3|s2[2]~I\, U2|u3|s2[2], clock, 1
instance = comp, \U2|u3|add_rtl_9|adder|unreg_res_node[3]~I\, U2|u3|add_rtl_9|adder|unreg_res_node[3], clock, 1
instance = comp, \U2|u3|s2[3]~I\, U2|u3|s2[3], clock, 1
instance = comp, \U2|u3|process0~24_I\, U2|u3|process0~24, clock, 1
instance = comp, \U2|u3|process0~0_I\, U2|u3|process0~0, clock, 1
instance = comp, \U2|u3|s2[1]~I\, U2|u3|s2[1], clock, 1
instance = comp, \co6~670_I\, co6~670, clock, 1
instance = comp, \co6~671_I\, co6~671, clock, 1
instance = comp, \co6~672_I\, co6~672, clock, 1
instance = comp, \co6~673_I\, co6~673, clock, 1
instance = comp, \U3|u5|add_rtl_11|adder|unreg_res_node[3]~I\, U3|u5|add_rtl_11|adder|unreg_res_node[3], clock, 1
instance = comp, \U3|u5|s2[3]~I\, U3|u5|s2[3], clock, 1
instance = comp, \U3|u3|add_rtl_10|adder|unreg_res_node[3]~I\, U3|u3|add_rtl_10|adder|unreg_res_node[3], clock, 1
instance = comp, \U3|u3|s2[3]~I\, U3|u3|s2[3], clock, 1
instance = comp, \co6~674_I\, co6~674, clock, 1
instance = comp, \co6~675_I\, co6~675, clock, 1
instance = comp, \c1~54_I\, c1~54, clock, 1
instance = comp, \c2~63_I\, c2~63, clock, 1
instance = comp, \c3~124_I\, c3~124, clock, 1
instance = comp, \co1[0]~I\, co1[0], clock, 1
instance = comp, \co1[1]~I\, co1[1], clock, 1
instance = comp, \co1[2]~I\, co1[2], clock, 1
instance = comp, \co1[3]~I\, co1[3], clock, 1
instance = comp, \co2[0]~I\, co2[0], clock, 1
instance = comp, \co2[1]~I\, co2[1], clock, 1
instance = comp, \co2[2]~I\, co2[2], clock, 1
instance = comp, \co2[3]~I\, co2[3], clock, 1
instance = comp, \co3[0]~I\, co3[0], clock, 1
instance = comp, \co3[1]~I\, co3[1], clock, 1
instance = comp, \co3[2]~I\, co3[2], clock, 1
instance = comp, \co3[3]~I\, co3[3], clock, 1
instance = comp, \co4[0]~I\, co4[0], clock, 1
instance = comp, \co4[1]~I\, co4[1], clock, 1
instance = comp, \co4[2]~I\, co4[2], clock, 1
instance = comp, \co4[3]~I\, co4[3], clock, 1
instance = comp, \co5[0]~I\, co5[0], clock, 1
instance = comp, \co5[1]~I\, co5[1], clock, 1
instance = comp, \co5[2]~I\, co5[2], clock, 1
instance = comp, \co5[3]~I\, co5[3], clock, 1
instance = comp, \co6[0]~I\, co6[0], clock, 1
instance = comp, \co6[1]~I\, co6[1], clock, 1
instance = comp, \co6[2]~I\, co6[2], clock, 1
instance = comp, \co6[3]~I\, co6[3], clock, 1
instance = comp, \c1~I\, c1, clock, 1
instance = comp, \c2~I\, c2, clock, 1
instance = comp, \c3~I\, c3, clock, 1