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📄 cancommunication.par

📁 此工程项目包可以实现基于spartan3与CAN总线连接后的的汽车时速的模拟仿真。并可计算轮速差的数值。当此数值超出规定的边界值时报警。
💻 PAR
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Release 7.1i par H.38Copyright (c) 1995-2005 Xilinx, Inc.  All rights reserved.PHEX::  Tue Nov 22 18:03:02 2005par -w -intstyle ise -ol std -t 1 cancommunication_map.ncd cancommunication.ncd
cancommunication.pcf Constraints file: cancommunication.pcf.Loading device for application Rf_Device from file '3s200.nph' in environment
C:/Xilinx.   "cancommunication" is an NCD, version 3.1, device xc3s200, package ft256,
speed -4Initializing temperature to 85.000 Celsius. (default - Range: 0.000 to 85.000
Celsius)Initializing voltage to 1.140 Volts. (default - Range: 1.140 to 1.260 Volts)Device speed data version:  "PRODUCTION 1.35 2005-01-22".Device Utilization Summary:   Number of BUFGMUXs                  1 out of 8      12%   Number of External IOBs            22 out of 173    12%      Number of LOCed IOBs            22 out of 22    100%   Number of Slices                  222 out of 1920   11%      Number of SLICEMs                0 out of 960     0%Overall effort level (-ol):   Standard (set by user)Placer effort level (-pl):    Standard (set by user)Placer cost table entry (-t): 1Router effort level (-rl):    Standard (set by user)Starting PlacerPhase 1.1Phase 1.1 (Checksum:989a5d) REAL time: 1 secs Phase 2.31Phase 2.31 (Checksum:1312cfe) REAL time: 1 secs Phase 3.2.Phase 3.2 (Checksum:1c9c37d) REAL time: 1 secs Phase 4.8.....................................Phase 4.8 (Checksum:9b53d3) REAL time: 1 secs Phase 5.5Phase 5.5 (Checksum:2faf07b) REAL time: 1 secs Phase 6.18Phase 6.18 (Checksum:39386fa) REAL time: 2 secs Phase 7.5Phase 7.5 (Checksum:42c1d79) REAL time: 2 secs Writing design to file cancommunication.ncdTotal REAL time to Placer completion: 2 secs Total CPU time to Placer completion: 1 secs Starting RouterPhase 1: 1462 unrouted;       REAL time: 2 secs Phase 2: 1354 unrouted;       REAL time: 2 secs Phase 3: 526 unrouted;       REAL time: 2 secs Phase 4: 0 unrouted;       REAL time: 2 secs Total REAL time to Router completion: 2 secs Total CPU time to Router completion: 2 secs Generating "PAR" statistics.**************************Generating Clock Report**************************+---------------------+--------------+------+------+------------+-------------+|        Clock Net    |   Resource   |Locked|Fanout|Net Skew(ns)|Max Delay(ns)|+---------------------+--------------+------+------+------------+-------------+|           clk_BUFGP |      BUFGMUX0| No   |  103 |  0.041     |  1.051      |+---------------------+--------------+------+------+------------+-------------+INFO:Par:340 -    The Delay report will not be generated when running non-timing driven PAR
   with effort level Standard or Medium. If a delay report is required please do
   one of the following:  1) use effort level High, 2) use the following
   environment variable "XIL_PAR_GENERATE_DLY_REPORT", 3) create Timing
   constraints for the design.Generating Pad Report.All signals are completely routed.Total REAL time to PAR completion: 15 secs Total CPU time to PAR completion: 4 secs Peak Memory Usage:  75 MBPlacement: Completed - No errors found.Routing: Completed - No errors found.Number of error messages: 0Number of warning messages: 0Number of info messages: 1Writing design to file cancommunication.ncdPAR done!

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