cancommunication_timesim.vhd

此工程项目包可以实现基于spartan3与CAN总线连接后的的汽车时速的模拟仿真。并可计算轮速差的数值。当此数值超出规定的边界值时报警。

    );
  N735_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => CHOICE176_pack_1,
      O => CHOICE176
    );
  Ker5912 : X_LUT4
    generic map(
      INIT => X"0001"
    )
    port map (
      ADR0 => staterw(25),
      ADR1 => staterw(26),
      ADR2 => staterw(12),
      ADR3 => staterw(4),
      O => CHOICE176_pack_1
    );
  Q_n0180_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0180,
      O => Q_n0180_0
    );
  Q_n0180_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0100_pack_1,
      O => Q_n0100
    );
  Q_n010022 : X_LUT4
    generic map(
      INIT => X"0D00"
    )
    port map (
      ADR0 => N796_0,
      ADR1 => CHOICE49_0,
      ADR2 => Q_n0189_34_0,
      ADR3 => N67,
      O => Q_n0100_pack_1
    );
  N761_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N761,
      O => N761_0
    );
  N761_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N184_pack_1,
      O => N184
    );
  Ker60_SW0 : X_LUT4
    generic map(
      INIT => X"00BF"
    )
    port map (
      ADR0 => N737_0,
      ADR1 => N753_0,
      ADR2 => CHOICE223,
      ADR3 => CHOICE110,
      O => N184_pack_1
    );
  CHOICE144_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => CHOICE144,
      O => CHOICE144_0
    );
  CHOICE144_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0065_pack_1,
      O => Q_n0065
    );
  Q_n00651 : X_LUT4
    generic map(
      INIT => X"0200"
    )
    port map (
      ADR0 => CHOICE223,
      ADR1 => N755_0,
      ADR2 => N735_0,
      ADR3 => CHOICE190,
      O => Q_n0065_pack_1
    );
  N14_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N14,
      O => N14_0
    );
  N14_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N67_pack_1,
      O => N67
    );
  Ker671 : X_LUT4
    generic map(
      INIT => X"000C"
    )
    port map (
      ADR0 => VCC,
      ADR1 => mode(0),
      ADR2 => mode(1),
      ADR3 => mode(2),
      O => N67_pack_1
    );
  Ker65_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Ker65,
      O => Ker65_0
    );
  Ker65_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0069_pack_1,
      O => Q_n0069
    );
  Q_n00691 : X_LUT4
    generic map(
      INIT => X"0008"
    )
    port map (
      ADR0 => CHOICE223,
      ADR1 => CHOICE190,
      ADR2 => N735_0,
      ADR3 => N745_0,
      O => Q_n0069_pack_1
    );
  N739_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N739,
      O => N739_0
    );
  N739_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => CHOICE110_pack_1,
      O => CHOICE110
    );
  Q_n00511 : X_LUT4
    generic map(
      INIT => X"0808"
    )
    port map (
      ADR0 => mode_1_1,
      ADR1 => mode_0_1,
      ADR2 => mode_2_1,
      ADR3 => VCC,
      O => CHOICE110_pack_1
    );
  N75_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N75,
      O => N75_0
    );
  N75_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0060_pack_1,
      O => Q_n0060
    );
  Q_n00601 : X_LUT4
    generic map(
      INIT => X"0040"
    )
    port map (
      ADR0 => N751,
      ADR1 => CHOICE190,
      ADR2 => CHOICE223,
      ADR3 => N737_0,
      O => Q_n0060_pack_1
    );
  N790_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N790,
      O => N790_0
    );
  N790_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0066_pack_1,
      O => Q_n0066
    );
  Q_n00661 : X_LUT4
    generic map(
      INIT => X"2000"
    )
    port map (
      ADR0 => CHOICE190,
      ADR1 => N735_0,
      ADR2 => N749_0,
      ADR3 => CHOICE223,
      O => Q_n0066_pack_1
    );
  N77_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N77,
      O => N77_0
    );
  N77_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => CHOICE223_pack_1,
      O => CHOICE223
    );
  Ker59143 : X_LUT4
    generic map(
      INIT => X"8000"
    )
    port map (
      ADR0 => CHOICE206_0,
      ADR1 => CHOICE221_0,
      ADR2 => CHOICE214_0,
      ADR3 => CHOICE199_0,
      O => CHOICE223_pack_1
    );
  N759_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N759,
      O => N759_0
    );
  N759_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N186_pack_1,
      O => N186
    );
  Ker22_SW0 : X_LUT4
    generic map(
      INIT => X"8F0F"
    )
    port map (
      ADR0 => N77_0,
      ADR1 => staterw(1),
      ADR2 => N711_0,
      ADR3 => staterw(2),
      O => N186_pack_1
    );
  CHOICE164_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => CHOICE164,
      O => CHOICE164_0
    );
  CHOICE164_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0061_pack_1,
      O => Q_n0061
    );
  Q_n00611 : X_LUT4
    generic map(
      INIT => X"0400"
    )
    port map (
      ADR0 => N737_0,
      ADR1 => CHOICE190,
      ADR2 => N755_0,
      ADR3 => CHOICE223,
      O => Q_n0061_pack_1
    );
  N753_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N753,
      O => N753_0
    );
  N753_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => CHOICE190_pack_1,
      O => CHOICE190
    );
  Ker5938 : X_LUT4
    generic map(
      INIT => X"0001"
    )
    port map (
      ADR0 => staterw(5),
      ADR1 => staterw(29),
      ADR2 => staterw(10),
      ADR3 => staterw(27),
      O => CHOICE190_pack_1
    );
  Q_n0184_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0184_SW0_O_pack_1,
      O => Q_n0184_SW0_O
    );
  Q_n0184_SW0 : X_LUT4
    generic map(
      INIT => X"A000"
    )
    port map (
      ADR0 => staterw(1),
      ADR1 => VCC,
      ADR2 => CHOICE123,
      ADR3 => N75_0,
      O => Q_n0184_SW0_O_pack_1
    );
  Q_n0185_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0185_SW0_O_pack_1,
      O => Q_n0185_SW0_O
    );
  Q_n0185_SW0 : X_LUT4
    generic map(
      INIT => X"2288"
    )
    port map (
      ADR0 => N75_0,
      ADR1 => staterw(2),
      ADR2 => VCC,
      ADR3 => staterw(1),
      O => Q_n0185_SW0_O_pack_1
    );
  Q_n0147_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0147,
      O => Q_n0147_0
    );
  Q_n0147_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n014731_O_pack_1,
      O => Q_n014731_O
    );
  Q_n014731 : X_LUT4
    generic map(
      INIT => X"D0F0"
    )
    port map (
      ADR0 => N4_0,
      ADR1 => state_FFd2,
      ADR2 => N67,
      ADR3 => state_FFd1,
      O => Q_n014731_O_pack_1
    );
  N60_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N60,
      O => N60_0
    );
  N60_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N80_pack_1,
      O => N80
    );
  Ker801 : X_LUT4
    generic map(
      INIT => X"F7FF"
    )
    port map (
      ADR0 => CHOICE183,
      ADR1 => CHOICE223,
      ADR2 => N802_0,
      ADR3 => CHOICE190,
      O => N80_pack_1
    );
  Q_n0181_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n0181,
      O => Q_n0181_0
    );
  Q_n0181_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Q_n018141_SW0_O_pack_1,
      O => Q_n018141_SW0_O
    );
  Q_n018141_SW0 : X_LUT4
    generic map(
      INIT => X"FECC"
    )
    port map (
      ADR0 => Q_n0065,
      ADR1 => CHOICE144_0,
      ADR2 => CHOICE147_0,
      ADR3 => CHOICE110,
      O => Q_n018141_SW0_O_pack_1
    );
  N711_XUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => N711,
      O => N711_0
    );
  N711_YUSED : X_BUF_PP
    generic map(
      PATHPULSE => 757 ps
    )
    port map (
      I => Ker59159_SW2_O_pack_1,
      O => Ker59159_SW2_O
    );
  Ker59159_SW2 : X_LUT4
    generic map(
      INIT => X"F7FF"
    )
    port map (
      ADR0 => staterw(3),
      ADR1 => CHOICE190,
      ADR2 => N148_0,
      ADR3 => CHOICE183,
      O => Ker59159_SW2_O_pack_1
    );
  Q_n0182_XUSED : X_BUF_PP
    generic