shift.tan.qmsg

移位寄存器,异步清零,异步置数,左移右移可控,具有循环移位功能

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "cp " "Info: Assuming node \"cp\" is an undefined clock" {  } { { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 5 -1 0 } } { "c:/altera/quartus51/bin/Assignment Editor.qase" "" { Assignment "c:/altera/quartus51/bin/Assignment Editor.qase" 1 { { 0 "cp" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "cp register temp\[2\]~975 register temp\[3\]~973 358.81 MHz 2.787 ns Internal " "Info: Clock \"cp\" has Internal fmax of 358.81 MHz between source register \"temp\[2\]~975\" and destination register \"temp\[3\]~973\" (period= 2.787 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "2.523 ns + Longest register register " "Info: + Longest register to register delay is 2.523 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns temp\[2\]~975 1 REG LCFF_X2_Y1_N13 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X2_Y1_N13; Fanout = 1; REG Node = 'temp\[2\]~975'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { temp[2]~975 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.446 ns) + CELL(0.206 ns) 0.652 ns temp\[2\]~976 2 COMB LCCOMB_X2_Y1_N16 3 " "Info: 2: + IC(0.446 ns) + CELL(0.206 ns) = 0.652 ns; Loc. = LCCOMB_X2_Y1_N16; Fanout = 3; COMB Node = 'temp\[2\]~976'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "0.652 ns" { temp[2]~975 temp[2]~976 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.393 ns) + CELL(0.370 ns) 1.415 ns temp\[3\]~981 3 COMB LCCOMB_X2_Y1_N26 1 " "Info: 3: + IC(0.393 ns) + CELL(0.370 ns) = 1.415 ns; Loc. = LCCOMB_X2_Y1_N26; Fanout = 1; COMB Node = 'temp\[3\]~981'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "0.763 ns" { temp[2]~976 temp[3]~981 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.376 ns) + CELL(0.624 ns) 2.415 ns temp\[3\]~982 4 COMB LCCOMB_X2_Y1_N30 1 " "Info: 4: + IC(0.376 ns) + CELL(0.624 ns) = 2.415 ns; Loc. = LCCOMB_X2_Y1_N30; Fanout = 1; COMB Node = 'temp\[3\]~982'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "1.000 ns" { temp[3]~981 temp[3]~982 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 2.523 ns temp\[3\]~973 5 REG LCFF_X2_Y1_N31 1 " "Info: 5: + IC(0.000 ns) + CELL(0.108 ns) = 2.523 ns; Loc. = LCFF_X2_Y1_N31; Fanout = 1; REG Node = 'temp\[3\]~973'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "0.108 ns" { temp[3]~982 temp[3]~973 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.308 ns ( 51.84 % ) " "Info: Total cell delay = 1.308 ns ( 51.84 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.215 ns ( 48.16 % ) " "Info: Total interconnect delay = 1.215 ns ( 48.16 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.523 ns" { temp[2]~975 temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.523 ns" { temp[2]~975 temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } { 0.000ns 0.446ns 0.393ns 0.376ns 0.000ns } { 0.000ns 0.206ns 0.370ns 0.624ns 0.108ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cp destination 2.924 ns + Shortest register " "Info: + Shortest clock path from clock \"cp\" to destination register is 2.924 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns cp 1 CLK PIN_45 4 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_45; Fanout = 4; CLK Node = 'cp'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { cp } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.324 ns) + CELL(0.666 ns) 2.924 ns temp\[3\]~973 2 REG LCFF_X2_Y1_N31 1 " "Info: 2: + IC(1.324 ns) + CELL(0.666 ns) = 2.924 ns; Loc. = LCFF_X2_Y1_N31; Fanout = 1; REG Node = 'temp\[3\]~973'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "1.990 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.600 ns ( 54.72 % ) " "Info: Total cell delay = 1.600 ns ( 54.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.324 ns ( 45.28 % ) " "Info: Total interconnect delay = 1.324 ns ( 45.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[3]~973 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cp source 2.924 ns - Longest register " "Info: - Longest clock path from clock \"cp\" to source register is 2.924 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns cp 1 CLK PIN_45 4 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_45; Fanout = 4; CLK Node = 'cp'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { cp } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.324 ns) + CELL(0.666 ns) 2.924 ns temp\[2\]~975 2 REG LCFF_X2_Y1_N13 1 " "Info: 2: + IC(1.324 ns) + CELL(0.666 ns) = 2.924 ns; Loc. = LCFF_X2_Y1_N13; Fanout = 1; REG Node = 'temp\[2\]~975'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "1.990 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.600 ns ( 54.72 % ) " "Info: Total cell delay = 1.600 ns ( 54.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.324 ns ( 45.28 % ) " "Info: Total interconnect delay = 1.324 ns ( 45.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[2]~975 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[3]~973 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[2]~975 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "%2!c! %3!s! clock skew is %1!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.523 ns" { temp[2]~975 temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.523 ns" { temp[2]~975 temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } { 0.000ns 0.446ns 0.393ns 0.376ns 0.000ns } { 0.000ns 0.206ns 0.370ns 0.624ns 0.108ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[3]~973 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[2]~975 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "Clock \"%1!s!\" has %8!s! fmax of %6!s! between source %2!s! \"%3!s!\" and destination %4!s! \"%5!s!\" (period= %7!s!)" 0 0}
{ "Info" "ITDB_TSU_RESULT" "temp\[3\]~973 c cp 6.598 ns register " "Info: tsu for register \"temp\[3\]~973\" (data pin = \"c\", clock pin = \"cp\") is 6.598 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "9.562 ns + Longest pin register " "Info: + Longest pin to register delay is 9.562 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.935 ns) 0.935 ns c 1 PIN PIN_25 6 " "Info: 1: + IC(0.000 ns) + CELL(0.935 ns) = 0.935 ns; Loc. = PIN_25; Fanout = 6; PIN Node = 'c'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { c } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(6.105 ns) + CELL(0.651 ns) 7.691 ns temp\[2\]~976 2 COMB LCCOMB_X2_Y1_N16 3 " "Info: 2: + IC(6.105 ns) + CELL(0.651 ns) = 7.691 ns; Loc. = LCCOMB_X2_Y1_N16; Fanout = 3; COMB Node = 'temp\[2\]~976'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "6.756 ns" { c temp[2]~976 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.393 ns) + CELL(0.370 ns) 8.454 ns temp\[3\]~981 3 COMB LCCOMB_X2_Y1_N26 1 " "Info: 3: + IC(0.393 ns) + CELL(0.370 ns) = 8.454 ns; Loc. = LCCOMB_X2_Y1_N26; Fanout = 1; COMB Node = 'temp\[3\]~981'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "0.763 ns" { temp[2]~976 temp[3]~981 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.376 ns) + CELL(0.624 ns) 9.454 ns temp\[3\]~982 4 COMB LCCOMB_X2_Y1_N30 1 " "Info: 4: + IC(0.376 ns) + CELL(0.624 ns) = 9.454 ns; Loc. = LCCOMB_X2_Y1_N30; Fanout = 1; COMB Node = 'temp\[3\]~982'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "1.000 ns" { temp[3]~981 temp[3]~982 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.108 ns) 9.562 ns temp\[3\]~973 5 REG LCFF_X2_Y1_N31 1 " "Info: 5: + IC(0.000 ns) + CELL(0.108 ns) = 9.562 ns; Loc. = LCFF_X2_Y1_N31; Fanout = 1; REG Node = 'temp\[3\]~973'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "0.108 ns" { temp[3]~982 temp[3]~973 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.688 ns ( 28.11 % ) " "Info: Total cell delay = 2.688 ns ( 28.11 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "6.874 ns ( 71.89 % ) " "Info: Total interconnect delay = 6.874 ns ( 71.89 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "9.562 ns" { c temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.562 ns" { c c~combout temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } { 0.000ns 0.000ns 6.105ns 0.393ns 0.376ns 0.000ns } { 0.000ns 0.935ns 0.651ns 0.370ns 0.624ns 0.108ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0} { "Info" "ITDB_FULL_TSU_DELAY" "-0.040 ns + " "Info: + Micro setup delay of destination is -0.040 ns" {  } { { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%2!c! Micro setup delay of destination is %1!s!" 0 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cp destination 2.924 ns - Shortest register " "Info: - Shortest clock path from clock \"cp\" to destination register is 2.924 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns cp 1 CLK PIN_45 4 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_45; Fanout = 4; CLK Node = 'cp'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { cp } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.324 ns) + CELL(0.666 ns) 2.924 ns temp\[3\]~973 2 REG LCFF_X2_Y1_N31 1 " "Info: 2: + IC(1.324 ns) + CELL(0.666 ns) = 2.924 ns; Loc. = LCFF_X2_Y1_N31; Fanout = 1; REG Node = 'temp\[3\]~973'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "1.990 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.600 ns ( 54.72 % ) " "Info: Total cell delay = 1.600 ns ( 54.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.324 ns ( 45.28 % ) " "Info: Total interconnect delay = 1.324 ns ( 45.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[3]~973 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "9.562 ns" { c temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "9.562 ns" { c c~combout temp[2]~976 temp[3]~981 temp[3]~982 temp[3]~973 } { 0.000ns 0.000ns 6.105ns 0.393ns 0.376ns 0.000ns } { 0.000ns 0.935ns 0.651ns 0.370ns 0.624ns 0.108ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[3]~973 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[3]~973 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "tsu for %5!s! \"%1!s!\" (data pin = \"%2!s!\", clock pin = \"%3!s!\") is %4!s!" 0 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "cp q2 temp\[2\]~975 8.931 ns register " "Info: tco from clock \"cp\" to destination pin \"q2\" through register \"temp\[2\]~975\" is 8.931 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "cp source 2.924 ns + Longest register " "Info: + Longest clock path from clock \"cp\" to source register is 2.924 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.934 ns) 0.934 ns cp 1 CLK PIN_45 4 " "Info: 1: + IC(0.000 ns) + CELL(0.934 ns) = 0.934 ns; Loc. = PIN_45; Fanout = 4; CLK Node = 'cp'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { cp } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 5 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.324 ns) + CELL(0.666 ns) 2.924 ns temp\[2\]~975 2 REG LCFF_X2_Y1_N13 1 " "Info: 2: + IC(1.324 ns) + CELL(0.666 ns) = 2.924 ns; Loc. = LCFF_X2_Y1_N13; Fanout = 1; REG Node = 'temp\[2\]~975'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "1.990 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.600 ns ( 54.72 % ) " "Info: Total cell delay = 1.600 ns ( 54.72 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.324 ns ( 45.28 % ) " "Info: Total interconnect delay = 1.324 ns ( 45.28 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[2]~975 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } }  } 0 0 "%4!c! %5!s! clock path from clock \"%1!s!\" to %2!s! %6!s! is %3!s!" 0 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.304 ns + " "Info: + Micro clock to output delay of source is 0.304 ns" {  } { { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%2!c! Micro clock to output delay of source is %1!s!" 0 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.703 ns + Longest register pin " "Info: + Longest register to pin delay is 5.703 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns temp\[2\]~975 1 REG LCFF_X2_Y1_N13 1 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LCFF_X2_Y1_N13; Fanout = 1; REG Node = 'temp\[2\]~975'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "" { temp[2]~975 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(0.446 ns) + CELL(0.206 ns) 0.652 ns temp\[2\]~976 2 COMB LCCOMB_X2_Y1_N16 3 " "Info: 2: + IC(0.446 ns) + CELL(0.206 ns) = 0.652 ns; Loc. = LCCOMB_X2_Y1_N16; Fanout = 3; COMB Node = 'temp\[2\]~976'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "0.652 ns" { temp[2]~975 temp[2]~976 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 14 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_NODE_DELAY" "IC(1.835 ns) + CELL(3.216 ns) 5.703 ns q2 3 PIN PIN_53 0 " "Info: 3: + IC(1.835 ns) + CELL(3.216 ns) = 5.703 ns; Loc. = PIN_53; Fanout = 0; PIN Node = 'q2'" {  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "5.051 ns" { temp[2]~976 q2 } "NODE_NAME" } "" } } { "shift.vhd" "" { Text "C:/altera/quartus51/shift/shift.vhd" 6 -1 0 } }  } 0 0 "%4!d!: + %1!s! = %2!s!; Loc. = %6!s!; Fanout = %7!d!; %5!s! Node = '%3!s!'" 0 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.422 ns ( 60.00 % ) " "Info: Total cell delay = 3.422 ns ( 60.00 % )" {  } {  } 0 0 "Total cell delay = %1!s! %2!s!" 0 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.281 ns ( 40.00 % ) " "Info: Total interconnect delay = 2.281 ns ( 40.00 % )" {  } {  } 0 0 "Total interconnect delay = %1!s! %2!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "5.703 ns" { temp[2]~975 temp[2]~976 q2 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.703 ns" { temp[2]~975 temp[2]~976 q2 } { 0.000ns 0.446ns 1.835ns } { 0.000ns 0.206ns 3.216ns } } }  } 0 0 "%2!c! %3!s! %4!s! to %5!s! delay is %1!s!" 0 0}  } { { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "2.924 ns" { cp temp[2]~975 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "2.924 ns" { cp cp~combout temp[2]~975 } { 0.000ns 0.000ns 1.324ns } { 0.000ns 0.934ns 0.666ns } } } { "c:/altera/quartus51/bin/Report_Window_01.qrpt" "" { Report "c:/altera/quartus51/bin/Report_Window_01.qrpt" "Compiler" "shift" "UNKNOWN" "V1" "C:/altera/quartus51/shift/db/shift.quartus_db" { Floorplan "C:/altera/quartus51/shift/" "" "5.703 ns" { temp[2]~975 temp[2]~976 q2 } "NODE_NAME" } "" } } { "c:/altera/quartus51/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus51/bin/Technology_Viewer.qrui" "5.703 ns" { temp[2]~975 temp[2]~976 q2 } { 0.000ns 0.446ns 1.835ns } { 0.000ns 0.206ns 3.216ns } } }  } 0 0 "tco from clock \"%1!s!\" to destination pin \"%2!s!\" through %5!s! \"%3!s!\" is %4!s!" 0 0}