count.fit.rpt

模可变计数器,可实现模2模8模10模16,异步清零,模可变加减计数

; 13                                          ; 1                           ;
; 14                                          ; 0                           ;
; 15                                          ; 0                           ;
; 16                                          ; 0                           ;
+---------------------------------------------+-----------------------------+


+------------------------------------------------------------------+
; LAB-wide Signals                                                 ;
+------------------------------------+-----------------------------+
; LAB-wide Signals  (Average = 3.00) ; Number of LABs  (Total = 1) ;
+------------------------------------+-----------------------------+
; 1 Async. clear                     ; 1                           ;
; 1 Clock                            ; 1                           ;
; 1 Clock enable                     ; 1                           ;
+------------------------------------+-----------------------------+


+----------------------------------------------------------------------------+
; LAB Signals Sourced                                                        ;
+----------------------------------------------+-----------------------------+
; Number of Signals Sourced  (Average = 17.00) ; Number of LABs  (Total = 1) ;
+----------------------------------------------+-----------------------------+
; 0                                            ; 0                           ;
; 1                                            ; 0                           ;
; 2                                            ; 0                           ;
; 3                                            ; 0                           ;
; 4                                            ; 0                           ;
; 5                                            ; 0                           ;
; 6                                            ; 0                           ;
; 7                                            ; 0                           ;
; 8                                            ; 0                           ;
; 9                                            ; 0                           ;
; 10                                           ; 0                           ;
; 11                                           ; 0                           ;
; 12                                           ; 0                           ;
; 13                                           ; 0                           ;
; 14                                           ; 0                           ;
; 15                                           ; 0                           ;
; 16                                           ; 0                           ;
; 17                                           ; 1                           ;
+----------------------------------------------+-----------------------------+


+-------------------------------------------------------------------------------+
; LAB Signals Sourced Out                                                       ;
+-------------------------------------------------+-----------------------------+
; Number of Signals Sourced Out  (Average = 4.00) ; Number of LABs  (Total = 1) ;
+-------------------------------------------------+-----------------------------+
; 0                                               ; 0                           ;
; 1                                               ; 0                           ;
; 2                                               ; 0                           ;
; 3                                               ; 0                           ;
; 4                                               ; 1                           ;
+-------------------------------------------------+-----------------------------+


+---------------------------------------------------------------------------+
; LAB Distinct Inputs                                                       ;
+---------------------------------------------+-----------------------------+
; Number of Distinct Inputs  (Average = 6.00) ; Number of LABs  (Total = 1) ;
+---------------------------------------------+-----------------------------+
; 0                                           ; 0                           ;
; 1                                           ; 0                           ;
; 2                                           ; 0                           ;
; 3                                           ; 0                           ;
; 4                                           ; 0                           ;
; 5                                           ; 0                           ;
; 6                                           ; 1                           ;
+---------------------------------------------+-----------------------------+


+-----------------+
; Fitter Messages ;
+-----------------+
Info: *******************************************************************
Info: Running Quartus II Fitter
    Info: Version 5.1 Build 213 01/19/2006 Service Pack 1 SJ Full Version
    Info: Processing started: Thu Nov 29 19:32:44 2007
Info: Command: quartus_fit --read_settings_files=off --write_settings_files=off count -c count
Info: Selected device EP2C5T144C8 for design "count"
Info: Fitter is performing an Auto Fit compilation, which may decrease Fitter effort to reduce compilation time
Info: Timing requirements not specified -- optimizing circuit to achieve the following default global requirements
    Info: Assuming a global fmax requirement of 1 MHz
    Info: Not setting a global tsu requirement
    Info: Not setting a global tco requirement
    Info: Not setting a global tpd requirement
Info: Device migration not selected. If you intend to use device migration later, you may need to change the pin assignments as they may be incompatible with other devices
    Info: Device EP2C5T144I8 is compatible
    Info: Device EP2C8T144C8 is compatible
    Info: Device EP2C8T144I8 is compatible
Info: Starting register packing
Info: Performing register packing on registers with non-logic cell location assignments
Info: Completed register packing on registers with non-logic cell location assignments
Info: Started Fast Input/Output/OE register processing
Info: Finished Fast Input/Output/OE register processing
Info: Moving registers into I/O cells, Multiplier Blocks, and RAM blocks to improve timing and density
Info: Finished moving registers into I/O cells, Multiplier Blocks, and RAM blocks
Info: Finished register packing
Info: Fitter placement preparation operations beginning
Info: Fitter is using Normal packing mode for logic elements with Auto setting for Auto Packed Registers logic option
Info: Fitter placement preparation operations ending: elapsed time is 00:00:00
Info: Fitter placement operations beginning
Info: Fitter placement was successful
Info: Fitter placement operations ending: elapsed time is 00:00:00
Info: Estimated most critical path is register to register delay of 2.611 ns
    Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X2_Y4; Fanout = 3; REG Node = 'iq[3]'
    Info: 2: + IC(0.230 ns) + CELL(0.651 ns) = 0.881 ns; Loc. = LAB_X2_Y4; Fanout = 1; COMB Node = 'iq[2]~2607'
    Info: 3: + IC(0.187 ns) + CELL(0.624 ns) = 1.692 ns; Loc. = LAB_X2_Y4; Fanout = 2; COMB Node = 'iq[2]~2609'
    Info: 4: + IC(0.187 ns) + CELL(0.624 ns) = 2.503 ns; Loc. = LAB_X2_Y4; Fanout = 1; COMB Node = 'iq~2610'
    Info: 5: + IC(0.000 ns) + CELL(0.108 ns) = 2.611 ns; Loc. = LAB_X2_Y4; Fanout = 5; REG Node = 'iq[2]'
    Info: Total cell delay = 2.007 ns ( 76.87 % )
    Info: Total interconnect delay = 0.604 ns ( 23.13 % )
Info: Fitter routing operations beginning
Info: Average interconnect usage is 0% of the available device resources. Peak interconnect usage is 0%
Info: Fitter routing operations ending: elapsed time is 00:00:00
Info: The Fitter performed an Auto Fit compilation.  Optimizations were skipped to reduce compilation time.
    Info: Optimizations that may affect the design's routability were skipped
    Info: Optimizations that may affect the design's timing were skipped
Info: Started post-fitting delay annotation
Warning: Timing characteristics of device EP2C5T144C8 are preliminary
Warning: Found 4 output pins without output pin load capacitance assignment
    Warning: Pin "q3" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "q2" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "q1" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
    Warning: Pin "q0" has no specified output pin load capacitance -- assuming default load capacitance of 0 pF for timing analysis
Info: Delay annotation completed successfully
Info: Quartus II Fitter was successful. 0 errors, 6 warnings
    Info: Processing ended: Thu Nov 29 19:32:47 2007
    Info: Elapsed time: 00:00:04