new_compare.sim.rpt

这是一个定时比较器

; |compare1|LessThan0~77  ; |compare1|LessThan0~77  ; out0             ;
; |compare1|LessThan0~78  ; |compare1|LessThan0~78  ; out0             ;
; |compare1|LessThan0~79  ; |compare1|LessThan0~79  ; out0             ;
; |compare1|LessThan0~80  ; |compare1|LessThan0~80  ; out0             ;
; |compare1|LessThan0~81  ; |compare1|LessThan0~81  ; out0             ;
; |compare1|LessThan0~82  ; |compare1|LessThan0~82  ; out0             ;
; |compare1|LessThan0~83  ; |compare1|LessThan0~83  ; out0             ;
; |compare1|LessThan0~84  ; |compare1|LessThan0~84  ; out0             ;
; |compare1|LessThan0~85  ; |compare1|LessThan0~85  ; out0             ;
; |compare1|LessThan0~86  ; |compare1|LessThan0~86  ; out0             ;
; |compare1|LessThan0~87  ; |compare1|LessThan0~87  ; out0             ;
; |compare1|LessThan0~88  ; |compare1|LessThan0~88  ; out0             ;
; |compare1|LessThan0~89  ; |compare1|LessThan0~89  ; out0             ;
; |compare1|LessThan0~90  ; |compare1|LessThan0~90  ; out0             ;
; |compare1|LessThan0~91  ; |compare1|LessThan0~91  ; out0             ;
; |compare1|LessThan0~92  ; |compare1|LessThan0~92  ; out0             ;
; |compare1|LessThan0~93  ; |compare1|LessThan0~93  ; out0             ;
; |compare1|LessThan0~94  ; |compare1|LessThan0~94  ; out0             ;
; |compare1|LessThan0~95  ; |compare1|LessThan0~95  ; out0             ;
; |compare1|LessThan0~96  ; |compare1|LessThan0~96  ; out0             ;
; |compare1|LessThan0~97  ; |compare1|LessThan0~97  ; out0             ;
; |compare1|LessThan0~98  ; |compare1|LessThan0~98  ; out0             ;
; |compare1|LessThan0~99  ; |compare1|LessThan0~99  ; out0             ;
; |compare1|LessThan0~100 ; |compare1|LessThan0~100 ; out0             ;
; |compare1|LessThan0~102 ; |compare1|LessThan0~102 ; out0             ;
; |compare1|LessThan0~104 ; |compare1|LessThan0~104 ; out0             ;
; |compare1|LessThan0~106 ; |compare1|LessThan0~106 ; out0             ;
; |compare1|LessThan0~108 ; |compare1|LessThan0~108 ; out0             ;
; |compare1|LessThan0~110 ; |compare1|LessThan0~110 ; out0             ;
; |compare1|LessThan0~111 ; |compare1|LessThan0~111 ; out0             ;
; |compare1|LessThan0~112 ; |compare1|LessThan0~112 ; out0             ;
; |compare1|LessThan0~114 ; |compare1|LessThan0~114 ; out0             ;
; |compare1|LessThan0~116 ; |compare1|LessThan0~116 ; out0             ;
; |compare1|LessThan0~118 ; |compare1|LessThan0~118 ; out0             ;
; |compare1|LessThan0~120 ; |compare1|LessThan0~120 ; out0             ;
; |compare1|LessThan0~122 ; |compare1|LessThan0~122 ; out0             ;
; |compare1|LessThan0~124 ; |compare1|LessThan0~124 ; out0             ;
; |compare1|Equal0~17     ; |compare1|Equal0~17     ; out0             ;
; |compare1|Equal0~18     ; |compare1|Equal0~18     ; out0             ;
; |compare1|Equal0~19     ; |compare1|Equal0~19     ; out0             ;
; |compare1|Equal0~20     ; |compare1|Equal0~20     ; out0             ;
; |compare1|Equal0~21     ; |compare1|Equal0~21     ; out0             ;
; |compare1|Equal0~22     ; |compare1|Equal0~22     ; out0             ;
; |compare1|Equal0~23     ; |compare1|Equal0~23     ; out0             ;
; |compare1|Equal0~24     ; |compare1|Equal0~24     ; out0             ;
; |compare1|Equal0~25     ; |compare1|Equal0~25     ; out0             ;
; |compare1|Equal0~26     ; |compare1|Equal0~26     ; out0             ;
; |compare1|Equal0~29     ; |compare1|Equal0~29     ; out0             ;
; |compare1|Equal0~33     ; |compare1|Equal0~33     ; out0             ;
+-------------------------+-------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+----------------------------------------------------------------------+
; Missing 1-Value Coverage                                             ;
+-------------------------+-------------------------+------------------+
; Node Name               ; Output Port Name        ; Output Port Type ;
+-------------------------+-------------------------+------------------+
; |compare1|a1[10]        ; |compare1|a1[10]        ; out              ;
; |compare1|a1[11]        ; |compare1|a1[11]        ; out              ;
; |compare1|a1[13]        ; |compare1|a1[13]        ; out              ;
; |compare1|a1[14]        ; |compare1|a1[14]        ; out              ;
; |compare1|a1[15]        ; |compare1|a1[15]        ; out              ;
; |compare1|b1[10]        ; |compare1|b1[10]        ; out              ;
; |compare1|b1[11]        ; |compare1|b1[11]        ; out              ;
; |compare1|b1[12]        ; |compare1|b1[12]        ; out              ;
; |compare1|b1[13]        ; |compare1|b1[13]        ; out              ;
; |compare1|b1[14]        ; |compare1|b1[14]        ; out              ;
; |compare1|b1[15]        ; |compare1|b1[15]        ; out              ;
; |compare1|LessThan0~101 ; |compare1|LessThan0~101 ; out0             ;
; |compare1|LessThan0~103 ; |compare1|LessThan0~103 ; out0             ;
; |compare1|LessThan0~105 ; |compare1|LessThan0~105 ; out0             ;
; |compare1|LessThan0~107 ; |compare1|LessThan0~107 ; out0             ;
; |compare1|LessThan0~109 ; |compare1|LessThan0~109 ; out0             ;
; |compare1|LessThan0~113 ; |compare1|LessThan0~113 ; out0             ;
; |compare1|LessThan0~115 ; |compare1|LessThan0~115 ; out0             ;
; |compare1|LessThan0~117 ; |compare1|LessThan0~117 ; out0             ;
; |compare1|LessThan0~119 ; |compare1|LessThan0~119 ; out0             ;
; |compare1|LessThan0~121 ; |compare1|LessThan0~121 ; out0             ;
; |compare1|LessThan0~123 ; |compare1|LessThan0~123 ; out0             ;
; |compare1|Equal0~27     ; |compare1|Equal0~27     ; out0             ;
; |compare1|Equal0~28     ; |compare1|Equal0~28     ; out0             ;
; |compare1|Equal0~30     ; |compare1|Equal0~30     ; out0             ;
; |compare1|Equal0~31     ; |compare1|Equal0~31     ; out0             ;
; |compare1|Equal0~32     ; |compare1|Equal0~32     ; out0             ;
+-------------------------+-------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+----------------------------------------------------------------------+
; Missing 0-Value Coverage                                             ;
+-------------------------+-------------------------+------------------+
; Node Name               ; Output Port Name        ; Output Port Type ;
+-------------------------+-------------------------+------------------+
; |compare1|a1[9]         ; |compare1|a1[9]         ; out              ;
; |compare1|a1[10]        ; |compare1|a1[10]        ; out              ;
; |compare1|a1[11]        ; |compare1|a1[11]        ; out              ;
; |compare1|a1[13]        ; |compare1|a1[13]        ; out              ;
; |compare1|a1[14]        ; |compare1|a1[14]        ; out              ;
; |compare1|a1[15]        ; |compare1|a1[15]        ; out              ;
; |compare1|b1[9]         ; |compare1|b1[9]         ; out              ;
; |compare1|b1[10]        ; |compare1|b1[10]        ; out              ;
; |compare1|b1[11]        ; |compare1|b1[11]        ; out              ;
; |compare1|b1[12]        ; |compare1|b1[12]        ; out              ;
; |compare1|b1[13]        ; |compare1|b1[13]        ; out              ;
; |compare1|b1[14]        ; |compare1|b1[14]        ; out              ;
; |compare1|b1[15]        ; |compare1|b1[15]        ; out              ;
; |compare1|LessThan0~101 ; |compare1|LessThan0~101 ; out0             ;
; |compare1|LessThan0~103 ; |compare1|LessThan0~103 ; out0             ;
; |compare1|LessThan0~105 ; |compare1|LessThan0~105 ; out0             ;
; |compare1|LessThan0~107 ; |compare1|LessThan0~107 ; out0             ;
; |compare1|LessThan0~109 ; |compare1|LessThan0~109 ; out0             ;
; |compare1|LessThan0~113 ; |compare1|LessThan0~113 ; out0             ;
; |compare1|LessThan0~115 ; |compare1|LessThan0~115 ; out0             ;
; |compare1|LessThan0~117 ; |compare1|LessThan0~117 ; out0             ;
; |compare1|LessThan0~119 ; |compare1|LessThan0~119 ; out0             ;
; |compare1|LessThan0~121 ; |compare1|LessThan0~121 ; out0             ;
; |compare1|LessThan0~123 ; |compare1|LessThan0~123 ; out0             ;
; |compare1|Equal0~27     ; |compare1|Equal0~27     ; out0             ;
; |compare1|Equal0~28     ; |compare1|Equal0~28     ; out0             ;
; |compare1|Equal0~30     ; |compare1|Equal0~30     ; out0             ;
; |compare1|Equal0~31     ; |compare1|Equal0~31     ; out0             ;
; |compare1|Equal0~32     ; |compare1|Equal0~32     ; out0             ;
+-------------------------+-------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.1 Build 178 06/25/2007 Service Pack 1 SJ Web Edition
    Info: Processing started: Mon Nov 12 09:42:17 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off new_compare -c new_compare
Info: Using vector source file "E:/mywork/new_compare/Waveform.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      75.83 %
Info: Number of transitions in simulation is 18389
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Allocated 92 megabytes of memory during processing
    Info: Processing ended: Mon Nov 12 09:42:20 2007
    Info: Elapsed time: 00:00:03