new_duty.sim.rpt

这是一个定时比较器

; |new_pwm|wr_period[4]  ; |new_pwm|wr_period[4]  ; out              ;
; |new_pwm|wr_period[5]  ; |new_pwm|wr_period[5]  ; out              ;
; |new_pwm|wr_period[6]  ; |new_pwm|wr_period[6]  ; out              ;
; |new_pwm|wr_period[7]  ; |new_pwm|wr_period[7]  ; out              ;
; |new_pwm|wr_period[8]  ; |new_pwm|wr_period[8]  ; out              ;
; |new_pwm|wr_period[9]  ; |new_pwm|wr_period[9]  ; out              ;
; |new_pwm|wr_period[10] ; |new_pwm|wr_period[10] ; out              ;
; |new_pwm|wr_period[11] ; |new_pwm|wr_period[11] ; out              ;
; |new_pwm|LessThan0~49  ; |new_pwm|LessThan0~49  ; out0             ;
; |new_pwm|LessThan0~53  ; |new_pwm|LessThan0~53  ; out0             ;
; |new_pwm|LessThan0~57  ; |new_pwm|LessThan0~57  ; out0             ;
; |new_pwm|LessThan0~65  ; |new_pwm|LessThan0~65  ; out0             ;
; |new_pwm|LessThan0~69  ; |new_pwm|LessThan0~69  ; out0             ;
; |new_pwm|LessThan0~73  ; |new_pwm|LessThan0~73  ; out0             ;
; |new_pwm|LessThan0~77  ; |new_pwm|LessThan0~77  ; out0             ;
; |new_pwm|LessThan0~81  ; |new_pwm|LessThan0~81  ; out0             ;
; |new_pwm|LessThan0~83  ; |new_pwm|LessThan0~83  ; out0             ;
; |new_pwm|LessThan0~85  ; |new_pwm|LessThan0~85  ; out0             ;
; |new_pwm|LessThan0~87  ; |new_pwm|LessThan0~87  ; out0             ;
; |new_pwm|LessThan0~89  ; |new_pwm|LessThan0~89  ; out0             ;
; |new_pwm|LessThan0~91  ; |new_pwm|LessThan0~91  ; out0             ;
; |new_pwm|LessThan1~63  ; |new_pwm|LessThan1~63  ; out0             ;
; |new_pwm|LessThan1~83  ; |new_pwm|LessThan1~83  ; out0             ;
; |new_pwm|LessThan1~85  ; |new_pwm|LessThan1~85  ; out0             ;
; |new_pwm|LessThan1~87  ; |new_pwm|LessThan1~87  ; out0             ;
; |new_pwm|LessThan1~89  ; |new_pwm|LessThan1~89  ; out0             ;
; |new_pwm|LessThan1~91  ; |new_pwm|LessThan1~91  ; out0             ;
; |new_pwm|LessThan1~93  ; |new_pwm|LessThan1~93  ; out0             ;
; |new_pwm|Add0~91       ; |new_pwm|Add0~91       ; out0             ;
; |new_pwm|Add0~94       ; |new_pwm|Add0~94       ; out0             ;
+------------------------+------------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+--------------------------------------------------------------------+
; Missing 0-Value Coverage                                           ;
+------------------------+------------------------+------------------+
; Node Name              ; Output Port Name       ; Output Port Type ;
+------------------------+------------------------+------------------+
; |new_pwm|period~0      ; |new_pwm|period~0      ; out              ;
; |new_pwm|period~1      ; |new_pwm|period~1      ; out              ;
; |new_pwm|period~2      ; |new_pwm|period~2      ; out              ;
; |new_pwm|period~3      ; |new_pwm|period~3      ; out              ;
; |new_pwm|period~4      ; |new_pwm|period~4      ; out              ;
; |new_pwm|period~5      ; |new_pwm|period~5      ; out              ;
; |new_pwm|period~6      ; |new_pwm|period~6      ; out              ;
; |new_pwm|period~7      ; |new_pwm|period~7      ; out              ;
; |new_pwm|period~8      ; |new_pwm|period~8      ; out              ;
; |new_pwm|period~9      ; |new_pwm|period~9      ; out              ;
; |new_pwm|period~10     ; |new_pwm|period~10     ; out              ;
; |new_pwm|period~11     ; |new_pwm|period~11     ; out              ;
; |new_pwm|duty~0        ; |new_pwm|duty~0        ; out              ;
; |new_pwm|duty~1        ; |new_pwm|duty~1        ; out              ;
; |new_pwm|duty~2        ; |new_pwm|duty~2        ; out              ;
; |new_pwm|duty~4        ; |new_pwm|duty~4        ; out              ;
; |new_pwm|duty~5        ; |new_pwm|duty~5        ; out              ;
; |new_pwm|duty~6        ; |new_pwm|duty~6        ; out              ;
; |new_pwm|duty~8        ; |new_pwm|duty~8        ; out              ;
; |new_pwm|duty~9        ; |new_pwm|duty~9        ; out              ;
; |new_pwm|duty~10       ; |new_pwm|duty~10       ; out              ;
; |new_pwm|counter[9]    ; |new_pwm|counter[9]    ; regout           ;
; |new_pwm|counter[10]   ; |new_pwm|counter[10]   ; regout           ;
; |new_pwm|counter[11]   ; |new_pwm|counter[11]   ; regout           ;
; |new_pwm|duty[1]       ; |new_pwm|duty[1]       ; regout           ;
; |new_pwm|duty[2]       ; |new_pwm|duty[2]       ; regout           ;
; |new_pwm|duty[3]       ; |new_pwm|duty[3]       ; regout           ;
; |new_pwm|duty[5]       ; |new_pwm|duty[5]       ; regout           ;
; |new_pwm|duty[6]       ; |new_pwm|duty[6]       ; regout           ;
; |new_pwm|duty[7]       ; |new_pwm|duty[7]       ; regout           ;
; |new_pwm|duty[8]       ; |new_pwm|duty[8]       ; regout           ;
; |new_pwm|duty[9]       ; |new_pwm|duty[9]       ; regout           ;
; |new_pwm|duty[10]      ; |new_pwm|duty[10]      ; regout           ;
; |new_pwm|duty[11]      ; |new_pwm|duty[11]      ; regout           ;
; |new_pwm|period[0]     ; |new_pwm|period[0]     ; regout           ;
; |new_pwm|period[1]     ; |new_pwm|period[1]     ; regout           ;
; |new_pwm|period[2]     ; |new_pwm|period[2]     ; regout           ;
; |new_pwm|period[3]     ; |new_pwm|period[3]     ; regout           ;
; |new_pwm|period[4]     ; |new_pwm|period[4]     ; regout           ;
; |new_pwm|period[5]     ; |new_pwm|period[5]     ; regout           ;
; |new_pwm|period[6]     ; |new_pwm|period[6]     ; regout           ;
; |new_pwm|period[7]     ; |new_pwm|period[7]     ; regout           ;
; |new_pwm|period[8]     ; |new_pwm|period[8]     ; regout           ;
; |new_pwm|period[9]     ; |new_pwm|period[9]     ; regout           ;
; |new_pwm|period[10]    ; |new_pwm|period[10]    ; regout           ;
; |new_pwm|period[11]    ; |new_pwm|period[11]    ; regout           ;
; |new_pwm|addr          ; |new_pwm|addr          ; out              ;
; |new_pwm|wrData[1]     ; |new_pwm|wrData[1]     ; out              ;
; |new_pwm|wrData[2]     ; |new_pwm|wrData[2]     ; out              ;
; |new_pwm|wrData[3]     ; |new_pwm|wrData[3]     ; out              ;
; |new_pwm|wrData[5]     ; |new_pwm|wrData[5]     ; out              ;
; |new_pwm|wrData[6]     ; |new_pwm|wrData[6]     ; out              ;
; |new_pwm|wrData[7]     ; |new_pwm|wrData[7]     ; out              ;
; |new_pwm|wrData[9]     ; |new_pwm|wrData[9]     ; out              ;
; |new_pwm|wrData[10]    ; |new_pwm|wrData[10]    ; out              ;
; |new_pwm|wrData[11]    ; |new_pwm|wrData[11]    ; out              ;
; |new_pwm|wr_period[1]  ; |new_pwm|wr_period[1]  ; out              ;
; |new_pwm|wr_period[2]  ; |new_pwm|wr_period[2]  ; out              ;
; |new_pwm|wr_period[3]  ; |new_pwm|wr_period[3]  ; out              ;
; |new_pwm|wr_period[4]  ; |new_pwm|wr_period[4]  ; out              ;
; |new_pwm|wr_period[5]  ; |new_pwm|wr_period[5]  ; out              ;
; |new_pwm|wr_period[6]  ; |new_pwm|wr_period[6]  ; out              ;
; |new_pwm|wr_period[7]  ; |new_pwm|wr_period[7]  ; out              ;
; |new_pwm|wr_period[9]  ; |new_pwm|wr_period[9]  ; out              ;
; |new_pwm|wr_period[10] ; |new_pwm|wr_period[10] ; out              ;
; |new_pwm|wr_period[11] ; |new_pwm|wr_period[11] ; out              ;
; |new_pwm|LessThan0~49  ; |new_pwm|LessThan0~49  ; out0             ;
; |new_pwm|LessThan0~53  ; |new_pwm|LessThan0~53  ; out0             ;
; |new_pwm|LessThan0~57  ; |new_pwm|LessThan0~57  ; out0             ;
; |new_pwm|LessThan0~65  ; |new_pwm|LessThan0~65  ; out0             ;
; |new_pwm|LessThan0~69  ; |new_pwm|LessThan0~69  ; out0             ;
; |new_pwm|LessThan0~73  ; |new_pwm|LessThan0~73  ; out0             ;
; |new_pwm|LessThan0~77  ; |new_pwm|LessThan0~77  ; out0             ;
; |new_pwm|LessThan0~81  ; |new_pwm|LessThan0~81  ; out0             ;
; |new_pwm|LessThan0~83  ; |new_pwm|LessThan0~83  ; out0             ;
; |new_pwm|LessThan0~85  ; |new_pwm|LessThan0~85  ; out0             ;
; |new_pwm|LessThan0~87  ; |new_pwm|LessThan0~87  ; out0             ;
; |new_pwm|LessThan0~89  ; |new_pwm|LessThan0~89  ; out0             ;
; |new_pwm|LessThan0~91  ; |new_pwm|LessThan0~91  ; out0             ;
; |new_pwm|LessThan1~63  ; |new_pwm|LessThan1~63  ; out0             ;
; |new_pwm|LessThan1~83  ; |new_pwm|LessThan1~83  ; out0             ;
; |new_pwm|LessThan1~85  ; |new_pwm|LessThan1~85  ; out0             ;
; |new_pwm|LessThan1~87  ; |new_pwm|LessThan1~87  ; out0             ;
; |new_pwm|LessThan1~89  ; |new_pwm|LessThan1~89  ; out0             ;
; |new_pwm|LessThan1~91  ; |new_pwm|LessThan1~91  ; out0             ;
; |new_pwm|LessThan1~93  ; |new_pwm|LessThan1~93  ; out0             ;
; |new_pwm|Add0~91       ; |new_pwm|Add0~91       ; out0             ;
; |new_pwm|Add0~94       ; |new_pwm|Add0~94       ; out0             ;
+------------------------+------------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 7.1 Build 178 06/25/2007 Service Pack 1 SJ Web Edition
    Info: Processing started: Tue Oct 30 16:55:08 2007
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off new_duty -c new_duty
Info: Using vector source file "../new_pwm/new_pwm.vwf"
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Warning: Found clock-sensitive change during active clock edge at time 20.0 ns on register "|new_pwm|PwmOut~reg0"
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      60.87 %
Info: Number of transitions in simulation is 54136
Info: Quartus II Simulator was successful. 0 errors, 1 warning
    Info: Allocated 92 megabytes of memory during processing
    Info: Processing ended: Tue Oct 30 16:55:13 2007
    Info: Elapsed time: 00:00:05