📄 fm.sim.rpt
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+-----------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------+
; Missing 0-Value Coverage ;
+--------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; Node Name ; Output Port Name ; Output Port Type ;
+--------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
; |FM|lpm_counter0:inst2|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[6] ; |FM|lpm_counter0:inst2|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|counter_cella6~COUT ; cout0 ;
; |FM|lpm_counter0:inst2|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[6] ; |FM|lpm_counter0:inst2|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|counter_cella6~COUTCOUT1_1 ; cout1 ;
; |FM|lpm_counter0:inst2|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|safe_q[5] ; |FM|lpm_counter0:inst2|lpm_counter:lpm_counter_component|cntr_adh:auto_generated|counter_cella5~COUT ; cout0 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; portadataout0 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[29] ; portadataout1 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[28] ; portadataout2 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[27] ; portadataout3 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[23] ; portadataout4 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[19] ; portadataout5 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[31] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[18] ; portadataout6 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; portadataout0 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[26] ; portadataout1 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[25] ; portadataout2 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[24] ; portadataout3 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[22] ; portadataout4 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[21] ; portadataout5 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[20] ; portadataout6 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[17] ; portadataout7 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[16] ; portadataout8 ;
; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[30] ; |FM|lpm_rom0:inst1|altsyncram:altsyncram_component|altsyncram_jm21:auto_generated|q_a[15] ; portadataout9 ;
; |FM|dds:inst|data_reg[31] ; |FM|dds:inst|data_reg[31] ; regout ;
; |FM|dds:inst|data_reg[15] ; |FM|dds:inst|data_reg[15] ; regout ;
; |FM|dds:inst|data_reg[30] ; |FM|dds:inst|data_reg[30] ; regout ;
; |FM|dds:inst|data_reg[29] ; |FM|dds:inst|data_reg[29] ; regout ;
; |FM|dds:inst|data_reg[28] ; |FM|dds:inst|data_reg[28] ; regout ;
; |FM|dds:inst|data_reg[27] ; |FM|dds:inst|data_reg[27] ; regout ;
; |FM|dds:inst|data_reg[26] ; |FM|dds:inst|data_reg[26] ; regout ;
; |FM|dds:inst|data_reg[25] ; |FM|dds:inst|data_reg[25] ; regout ;
; |FM|dds:inst|data_reg[24] ; |FM|dds:inst|data_reg[24] ; regout ;
; |FM|reset ; |FM|reset ; padio ;
; |FM|address[7] ; |FM|address[7] ; padio ;
; |FM|address[6] ; |FM|address[6] ; padio ;
; |FM|address[5] ; |FM|address[5] ; padio ;
; |FM|datain[31] ; |FM|datain[31] ; padio ;
; |FM|datain[30] ; |FM|datain[30] ; padio ;
; |FM|datain[29] ; |FM|datain[29] ; padio ;
; |FM|datain[28] ; |FM|datain[28] ; padio ;
; |FM|datain[27] ; |FM|datain[27] ; padio ;
; |FM|datain[26] ; |FM|datain[26] ; padio ;
; |FM|datain[25] ; |FM|datain[25] ; padio ;
; |FM|datain[24] ; |FM|datain[24] ; padio ;
; |FM|datain[23] ; |FM|datain[23] ; padio ;
; |FM|datain[22] ; |FM|datain[22] ; padio ;
; |FM|datain[21] ; |FM|datain[21] ; padio ;
; |FM|datain[20] ; |FM|datain[20] ; padio ;
; |FM|datain[19] ; |FM|datain[19] ; padio ;
; |FM|datain[18] ; |FM|datain[18] ; padio ;
; |FM|datain[17] ; |FM|datain[17] ; padio ;
; |FM|datain[16] ; |FM|datain[16] ; padio ;
; |FM|datain[15] ; |FM|datain[15] ; padio ;
; |FM|dir[1] ; |FM|dir[1] ; padio ;
; |FM|dir[0] ; |FM|dir[0] ; padio ;
; |FM|oe[1] ; |FM|oe[1] ; padio ;
; |FM|oe[0] ; |FM|oe[0] ; padio ;
+--------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------+------------------+
+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage ;
+--------+------------+
+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
Info: Version 6.0 Build 178 04/27/2006 SJ Web Edition
Info: Processing started: Sun Nov 27 12:07:18 2005
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off FM -c FM
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is 64.97 %
Info: Number of transitions in simulation is 99761
Info: Vector file FM.sim.vwf is saved in VWF text format. You can compress it into CVWF format in order to reduce file size. For more details please refer to the Quartus II Help.
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
Info: Processing ended: Sun Nov 27 12:07:30 2005
Info: Elapsed time: 00:00:13
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