fm.map.summary

来自「VHDL编写的驱动DDS」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Sat Nov 26 15:11:36 2005
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Web Edition
Revision Name : FM
Top-level Entity Name : FM
Family : Cyclone
Total logic elements : 81
Total pins : 57
Total virtual pins : 0
Total memory bits : 8,192
Total PLLs : 0