d_ff.vhd

来自「利用一块芯片完成除时钟源、按键、扬声器和显示器（数码管）之外的所有数字电路功能。」· VHDL 代码 · 共 20 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity d_ff is
port(clk,d0,d1,d2,d3:in std_logic;
     q0,q1,q2,q3:out std_logic);
end;
architecture d of d_ff is
begin
process(clk)
begin
if clk'event and clk='1' then 
	q0<=d0;
	q1<=d1;
	q2<=d2;
	q3<=d3;
end if;
end process;
end;