lib.dls

利用一块芯片完成除时钟源、按键、扬声器和显示器（数码管）之外的所有数字电路功能。所有数字逻辑功能都在CPLD器件上用VHDL语言实现。这样设计具有体积小、设计周期短（设计过程中即可实现时序仿真）、调试

DLSL
1
CONTR.VHDLVIEW U8719016.DLS
CONTR-D.SYNTHESISVIEW U3225183.DLS
CONTR-D.VHDLVIEW U0518996.DLS
DECODER.VHDLVIEW U2325680.DLS
DECODER-DE.SYNTHESISVIEW U5279743.DLS
DECODER-DE.VHDLVIEW U2518938.DLS
DECODER_DYNAMIC.VHDLVIEW U7217683.DLS
DECODER_DYNAMIC-DEC.SYNTHESISVIEW U2234390.DLS
DECODER_DYNAMIC-DEC.VHDLVIEW U5249682.DLS
D_FF.VHDLVIEW U1687655.DLS
D_FF-D.SYNTHESISVIEW U1456121.DLS
D_FF-D.VHDLVIEW U4278754.DLS
FRE_100.VHDLVIEW U4172679.DLS
FRE_100-FRE.SYNTHESISVIEW U5380684.DLS
FRE_100-FRE.VHDLVIEW U5230676.DLS
FRE_20.VHDLVIEW U2540496.DLS
FRE_20-FRE.SYNTHESISVIEW U9610435.DLS
FRE_20-FRE.VHDLVIEW U9137406.DLS
HOUR.VHDLVIEW U2964769.DLS
HOUR-HOUR_1.SYNTHESISVIEW U3450175.DLS
HOUR-HOUR_1.VHDLVIEW U2012254.DLS
LOCK.VHDLVIEW U0265958.DLS
LOCK-D.SYNTHESISVIEW U1861246.DLS
LOCK-D.VHDLVIEW U0319499.DLS
MMS.VHDLVIEW U8999522.DLS
MMS-MMS_1.SYNTHESISVIEW U5941649.DLS
MMS-MMS_1.VHDLVIEW U0139394.DLS
SEC.VHDLVIEW U0945119.DLS
SEC-SEC_1.SYNTHESISVIEW U5533475.DLS
SEC-SEC_1.VHDLVIEW U0359404.DLS