7to1.fit

vhd语言

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 10/17/2006 11:47:51      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "7to1"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "in1"                          : INPUT_PIN  = 2      ;
    "in2"                          : INPUT_PIN  = 42     ;
    "in3"                          : INPUT_PIN  = 44     ;
    "in4"                          : INPUT_PIN  = 84     ;
    "in5"                          : INPUT_PIN  = 1      ;
    "in6"                          : INPUT_PIN  = 43     ;
    "in7"                          : INPUT_PIN  = 73     ;
    "ouT0"                         : OUTPUT_PIN = 69     ;
    "ouT1"                         : OUTPUT_PIN = 71     ;
    "ouT2"                         : OUTPUT_PIN = 64     ;
    "ouT3"                         : OUTPUT_PIN = 67     ;
    "ouT4"                         : OUTPUT_PIN = 19     ;
    "ouT5"                         : OUTPUT_PIN = 65     ;
    "ouT6"                         : OUTPUT_PIN = 18     ;
    "ouT0~1"                       : LOCATION   = LC8_A23;
    "ouT1~1"                       : LOCATION   = LC4_A20;
    "ouT2~1"                       : LOCATION   = LC7_B19;
    "ouT3~1"                       : LOCATION   = LC1_B24;
    "ouT4~1"                       : LOCATION   = LC7_A12;
    "ouT5~1"                       : LOCATION   = LC5_B17;
    "ouT6~1"                       : LOCATION   = LC5_A7 ;

END;

INTERNAL_INFO "7to1"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD1P2   : LORAX = "1:FB1|2:FH1R0,PA20R0C22->LC8_A23||";
    OD3P42  : LORAX = "1:FB3|2:FH3R0,PA5R0C19->LC4_A20||";
    OD2P44  : LORAX = "1:FB2|2:FH2R1,PA6R1C18->LC7_B19||";
    OD0P84  : LORAX = "1:FB0|2:FH0R1,PA0R1C23->LC1_B24||";
    OD4P1   : LORAX = "1:FB4|2:CH0R0,PA19R0C11->LC7_A12||";
    OD5P43  : LORAX = "1:FB5|2:CH1R1,PA7R1C16->LC5_B17||";
    OH0R0P73 : LORAX = "1:G10R0,PA11R0C6->LC5_A7|";
    LC8_A23 : LORAX = "1:MSW7R0C22,HHR25R0->OH7R0P69|";
    LC4_A20 : LORAX = "1:MSW3R0C19,HHR13R0->OH3R0P71|";
    LC7_B19 : LORAX = "1:MSW6R1C19,G67R1->OH6R1P64|";
    LC1_B24 : LORAX = "1:MSW0R1C23,HHR20R1->OH0R1P67|";
    LC7_A12 : LORAX = "1:MSW6R0C11,G70R0->OH14R0P19|";
    LC5_B17 : LORAX = "1:MSW4R1C16,G62R1->OH4R1P65|";
    LC5_A7  : LORAX = "1:MSW4R0C6,HHL41R0->OH12R0P18|";
	LC8_A23 : LORAX2 = "X, X, X, OD1P2";
	LC4_A20 : LORAX2 = "X, X, X, OD3P42";
	LC7_B19 : LORAX2 = "X, X, X, OD2P44";
	LC1_B24 : LORAX2 = "X, X, X, OD0P84";
	LC7_A12 : LORAX2 = "X, X, X, OD4P1";
	LC5_B17 : LORAX2 = "X, X, X, OD5P43";
	LC5_A7  : LORAX2 = "X, X, X, OH0R0P73";
END;