📄 pacoblaze3_tb.vcd
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$date Mon Mar 20 14:39:02 2006$end$version GPLCVER_2.11a of 07/05/05$end$timescale 10 ps$end$scope module pacoblaze3_tb $end$scope module dut $end$var wire 10 ! address [9:0] $end$var wire 1 " alu_carry_out $end$var wire 8 # alu_operand_a [7:0] $end$var wire 8 $ alu_operand_b [7:0] $end$var wire 8 % alu_result [7:0] $end$var wire 1 & alu_zero_out $end$var reg 1 ' carry $end$var reg 1 ( carry_saved $end$var wire 1 ) clk $end$var wire 1 * conditional_match $end$var wire 10 + idu_code_address [9:0] $end$var wire 2 , idu_condition_flags [1:0] $end$var wire 1 - idu_conditional $end$var wire 256 . idu_debug_opcode [256:1] $end$var wire 8 / idu_implied_value [7:0] $end$var wire 1 0 idu_interrupt_enable $end$var wire 1 1 idu_operand_selection $end$var wire 5 2 idu_operation [4:0] $end$var wire 8 3 idu_port_address [7:0] $end$var wire 6 4 idu_scratch_address [5:0] $end$var wire 1 5 idu_shift_constant $end$var wire 1 6 idu_shift_direction $end$var wire 3 7 idu_shift_operation [2:0] $end$var wire 4 8 idu_x_address [3:0] $end$var wire 4 9 idu_y_address [3:0] $end$var wire 8 : in_port [7:0] $end$var wire 18 ; instruction [17:0] $end$var wire 1 < internal_reset $end$var wire 1 = interrupt $end$var reg 1 > interrupt_ack $end$var wire 1 ? interrupt_assert $end$var reg 1 @ interrupt_enable $end$var reg 1 A interrupt_latch $end$var wire 1 B is_call $end$var wire 1 C is_fetch $end$var wire 1 D is_input $end$var wire 1 E is_jump $end$var wire 1 F is_return $end$var wire 1 G is_returni $end$var wire 8 H out_port [7:0] $end$var wire 8 I port_id [7:0] $end$var reg 10 J program_counter [9:0] $end$var wire 10 K program_counter_next [9:0] $end$var wire 10 L program_counter_source [9:0] $end$var reg 1 M read_strobe $end$var wire 8 N register_x_data_in [7:0] $end$var wire 8 O register_x_data_out [7:0] $end$var reg 1 P register_x_write_enable $end$var wire 8 Q register_y_data_out [7:0] $end$var wire 1 R reset $end$var reg 2 S reset_latch [1:0] $end$var wire 6 T scratch_address [5:0] $end$var wire 8 U scratch_data_out [7:0] $end$var reg 1 V scratch_write_enable $end$var wire 10 W stack_data_in [9:0] $end$var wire 10 X stack_data_out [9:0] $end$var wire 1 Y stack_push_pop $end$var wire 1 Z stack_update_enable $end$var wire 1 [ stack_write_enable $end$var reg 1 \ timing_control $end$var reg 1 ] write_strobe $end$var reg 1 ^ zero $end$var reg 1 _ zero_carry_write_enable $end$var reg 1 ` zero_saved $end$scope begin seq $end$scope begin on_run $end$upscope $end$scope begin on_internal_reset $end$upscope $end$upscope $end$scope begin on_reset $end$upscope $end$scope task execute $end$var reg 5 a operation [4:0] $end$upscope $end$scope module idu $end$var wire 10 b code_address [9:0] $end$var wire 2 c condition_flags [1:0] $end$var wire 1 d conditional $end$var reg 16 e debug_conditional [16:1] $end$var reg 56 f debug_interrupt [56:1] $end$var reg 256 g debug_opcode [256:1] $end$var reg 40 h debug_operand [40:1] $end$var wire 8 i implied_value [7:0] $end$var wire 18 j instruction [17:0] $end$var wire 5 k instruction_0 [4:0] $end$var wire 1 l interrupt_enable $end$var wire 1 m operand_selection $end$var reg 5 n operation [4:0] $end$var wire 8 o port_address [7:0] $end$var wire 6 p scratch_address [5:0] $end$var wire 1 q shift_constant $end$var wire 1 r shift_direction $end$var wire 3 s shift_operation [2:0] $end$var wire 4 t x_address [3:0] $end$var wire 4 u y_address [3:0] $end$scope function adrtohex $end$var reg 18 x address [17:0] $end$var reg 24 y adrtohex [24:1] $end$upscope $end$scope function numtohex $end$var reg 4 v number [3:0] $end$var reg 8 w numtohex [8:1] $end$upscope $end$upscope $end$scope module alu $end$var wire 8 z addsub_b [7:0] $end$var wire 1 { addsub_carry $end$var wire 9 | addsub_result [8:0] $end$var wire 1 } carry_in $end$var reg 1 "! carry_out $end$var wire 8 "" operand_a [7:0] $end$var wire 8 "# operand_b [7:0] $end$var wire 5 "$ operation [4:0] $end$var reg 8 "% result [7:0] $end$var wire 1 "& shift_bit $end$var wire 1 "' shift_constant $end$var wire 1 "( shift_direction $end$var wire 3 ") shift_operation [2:0] $end$var reg 1 "* zero_out $end$scope begin on_alu $end$upscope $end$upscope $end$scope module register $end$var wire 1 "+ clk $end$var wire 1 ", reset $end$var wire 4 "- x_address [3:0] $end$var wire 8 ". x_data_in [7:0] $end$var wire 8 "/ x_data_out [7:0] $end$var wire 1 "0 x_write_enable $end$var wire 4 "1 y_address [3:0] $end$var wire 8 "2 y_data_out [7:0] $end$upscope $end$scope module stack $end$var wire 1 "3 clk $end$var wire 10 "4 data_in [9:0] $end$var wire 10 "5 data_out [9:0] $end$var reg 5 "6 ptr [4:0] $end$var wire 5 "7 ptr_1 [4:0] $end$var wire 1 "8 push_pop $end$var wire 1 "9 reset $end$var wire 1 ": update_enable $end$var wire 1 "; write_enable $end$upscope $end$scope module scratch $end$var wire 6 "< address [5:0] $end$var wire 1 "= clk $end$var wire 8 "> data_in [7:0] $end$var wire 8 "? data_out [7:0] $end$var wire 1 "@ reset $end$var wire 1 "A write_enable $end$upscope $end$upscope $end$upscope $end$enddefinitions $end#0$dumpvarsbx bbx cxdb10000000100000 eb1100100011010010111001101100001011000100110110001100101 fb10100001101110001011110110000100101001 gb1110011xxxxxxxx00101100xxxxxxxxxxxxxxxx hbx ibx jbx kxlxmbx nbx obx pxqxrb0xx sbx tbx ubx vbx wbx xbx ybx zx{bx |x}0"!bx ""bx "#bx "$bx "%x"&x"'x"(b0xx ")x"*0"3bx "4bx "5bx "6bx "7x"81"9x":x";0"+1",bx "-bx ".bx "/x"0bx "1bx "2bx "<0"=bx ">bx "?1"@x"Abx !0"bx #bx $bx %x&x'x(0)x*bx +bx ,x-b10100001101110001011110110000100101001 .bx /x0x1bx 2bx 3bx 4x5x6b0xx 7bx 8bx 9bx :bx ;x<0=x>0?x@xAxBxCxDxExFxGbx Hbx Ibx Jbx Kbx LxMbx Nbx OxPbx Q1Rbx Sbx Tbx UxVbx Wbx XxYxZx[x\x]x^x_x`bx a$end#501";1[0"A0"01<bx1 "70A0_0>0V0P0]0Mb11 Sb0 "61"+1"31"=1)#1000"+0"30"=0)#150b0 "40}b0 Wb0 !0@0'0^b0 J0\1"+1"31"=1)#2000",0"90"@0"+0"30"=0R0)#250b1 "70":1"8b1001 ".0{b1001 zb1 K0Z1Yb0 Lb1001 Nb0 "$0E0B0F0G0D0Cb1101100011011110110000101100100001000000111001100110000001011000011000000111001 .b0 20&b1001 %b111001100110000001011000011000000111001 hb111001 wb1001 vb111101000100000 eb1101100011011110110000101100100001000000111001100110000001011000011000000111001 gb0 nb1100101011011100110000101100010011011000110010100100000 f0"*b1001 "%b1001 :b1001 "<0"&b1001 "#1"(1"'b0 "-b0 "1b1001 Tb0 ")1*b1001 $b1001 I011016150-b0 8b0 9b1001 +b1001 4b0 7b0 ,b1001 /b1001 30m1l1r1q0db0 kb0 tb0 ub1001 bb1001 pb0 sb0 cb1001 ib1001 ob1001 jb1001 ;b10 S1"+1"31"=1)#3000"+0"30"=0)#3500";0[0<b0 S1"+1"31"=1)#4000"+0"30"=0)#450b1 "4b10 K1";1"0b1 Wb1 !b1 L1[1Pb1 J1\b0 a1"+1"31"=1)#5000"+0"30"=0)#550b11111110 ".b11111110 Nb11111110 %b1101100011011110110000101100100001000000111001100110001001011000110011001100101 .b11111110 "%b1101100011011110110000101100100001000000111001100110001001011000110011001100101 gb111001100110001001011000110011001100101 hb1100101 wb1110 vb1100100011010010111001101100001011000100110110001100101 fb11111110 :b11111110 zb111110 "<b11111110 "#0"'b1 "-b1111 "1b111110 Tb11 ")b11111110 $b11111110 I0005b1 8b1111 9b111111110 +b111110 4b11 7b11111110 /b11111110 3bx |0l0qb1 tb1111 ub111111110 bb111110 pb11 sb11111110 ib11111110 obx ""b111111110 jbx ">bx Hbx #0";b111111110 ;bx Obx Q0[0"0bx "/bx "20\0P1"+1"31"=1)#6000"+0"30"=0)#650b10 "4b11 K1";1"0b10 Wb10 !b10 L1[1Pb10 J1\1"+1"31"=1)#7000"+0"30"=0)#750b0 ".b0 N1&b0 %b1101100011011110110000101100100001000000111001101100110001011000011000000110000 .1"*b0 "%b1101100011011110110000101100100001000000111001101100110001011000011000000110000 gb111001101100110001011000011000000110000 hb110000 wb0 vb110111001100011 eb0 :b1001 Qb0 zb1001 "2b0 "<b0 "#0"(b1111 "-b0 "1b0 Tb0 ")b0 $b0 I06b1111 8b0 9b1100000000 +b0 4b0 7b11 ,b0 /b0 3bx |0rb1111 tb0 ub1100000000 bb0 pb0 sb11 cb0 ib0 obx ""b111100000000 jbx ">bx Hbx #0";b111100000000 ;bx O0[0"0bx "/0\0P1"+1"31"=1)#8000"+0"30"=0)#850b11 "4b100 K1";1"0b11 Wb11 !b11 L1[1Pb11 J1\1"+1"31"=1)#9000"+0"30"=0)#950b1101100011011110110000101100100001000000111001100110010001011000011000000110000 .b111101000100000 eb1101100011011110110000101100100001000000111001100110010001011000011000000110000 gb111001100110010001011000011000000110000 hb110000 wb0 vb10 "-b10 8b1000000000 +b0 ,bx |b10 tb1000000000 bb0 cbx ""b1000000000 jbx ">bx Hbx #0";b1000000000 ;bx O0[0"0bx "/0\0P1"+1"31"=1)#10000"+0"30"=0)#1050b100 "4b101 K1";1"0b100 Wb100 !b100 L1[1Pb100 J1\1"+1"31"=1)#11000"+0"30"=0)#1150b1001 ".b1001 Nb1100 "$0&b1001 %b1100 2b11000010110010001100100001000000111001100110010001011000111001100110000 .0"*b1001 "%b1100 nb10000000100000 eb11000010110010001100100001000000111001100110010001011000111001100110000 gb111001100110010001011000111001100110000 hb110000 wb0 vb1001 :b1001 zb1001 "<b1001 "#b1001 Tb1001 Ib1001 $0*111-b1001 |1m1db1100 kb0 ""b11001001000000000 jb0 ">b0 Hb0 #0";b11001001000000000 ;b0 O0[0"0b0 "/0\0P1"+1"31"=1)#12000"+0"30"=0)#1250b101 "4b110 K1";1"0b101 Wb101 !b101 L1[1_1Pb101 J1\b1100 a1"+1"31"=1)#13000"+0"30"=0)#1350b111 ".b111 Nb1101 "$b111 %1"b110000101100100011001000110001101111001001000000111001100110010001011000111001100110001 .b1101 2b111 "%1"!b111001100110010001011000111001100110001 hb110001 wb1 vb110000101100100011001000110001101111001001000000111001100110010001011000111001100110001 gb1101 nb11111110 :b11111110 zb111110 "<b11111110 "#b111110 Tb11111110 Ib11111110 $b11111110 Qb11111110 "2b1 "1b1 9b1000010000 +b10000 4b10000 /b10000 3b100000111 |b1101 kb1 ub1000010000 bb10000 pb10000 ib10000 ob1001 ""b11011001000010000 jb1001 ">b1001 Hb1001 #0";b11011001000010000 ;b1001 O0[0"0b1001 "/0\0_0P1"+1"31"=1)#14000"+0"30"=0)#1450b110 "4b111 K1";1"0b110 Wb110 !b110 L1[1_1Pb110 J1\b1101 a1"+1"31"=1)#15000"+0"30"=0)#1550b1 ".b1 Nb11110 "$b1 %0"b110100101101110011101000110010101110010011100100111010101110000011101000010000001100101011011100110000101100010011011000110010100100000 .b11110 2b1 "%0"!b111001100110000001011000011000000110001 hb110001 wb1 vb110100101101110011101000110010101110010011100100111010101110000011101000010000001100101011011100110000101100010011011000110010100100000 gb11110 nb111101000100000 eb1100101011011100110000101100010011011000110010100100000 fb1 :b1001 Qb1 zb1001 "2b1 "<b1 "#1"'1*b0 "-b0 "1b1 Tb1 $b1 I0110150-b0 8b0 9b1 +b1 4b1 /b1 30m1l1q0db11110 kb0 tb0 ub1 bb1 pb1 ib1 ob1001 ""b1010 |b111100000000000001 jb1001 ">b1001 Hb1001 #0{1"&0";b111100000000000001 ;b1001 O1}0[0"0b1001 "/1'0\0_0P1"+1"31"=1)#16000"+0"30"=0)#1650b111 "4b1000 K1";b111 Wb111 !b111 L1[1@b111 J1\b11110 a1"+1"31"=1)#17000"+0"30"=0)#1750b111 ".b10 "$1Db111 Nb110100101101110011100000111010101110100001000000111001100110011001011000111001100110010 .b10 2b111 %b111001100110011001011000111001100110010 hb110010 wb10 vb110100101101110011100000111010101110100001000000111001100110011001011000111001100110010 gb10 nb10000000100000 eb1100100011010010111001101100001011000100110110001100101 fb111 "%bx ""bx ">bx Hbx #bx |b111 :bx Ob111 Qb111 zbx "/b111 "2b111 "<b111 "#0"'0*b11 "-b10 "1b111 Tb111 $b111 I1100051-b11 8b10 9b1100100000 +b100000 4b100000 /b100000 31m0l0q1db10 kb11 tb10 ub1100100000 bb100000 pb100000 ib100000 ob101001100100000 j0";b101001100100000 ;0[0\1"+1"31"=1)#18000"+0"30"=0)#1850b1000 "4b1001 K1";1"0b1000 Wb1000 !b1000 L1[1P1Mb1000 J1\b10 a1"+1"31"=1)#19000"+0"30"=0)#1950b1111 "$0Db101 %b111001101110101011000100110001101111001001000000111001100110011001011000011000000110001 .b1111 2b101 "%b111001100110011001011000011000000110001 hb110001 wb1 vb111001101110101011000100110001101111001001000000111001100110011001011000011000000110001 gb1111 nb111101000100000 eb1100101011011100110000101100010011011000110010100100000 fb101 ".b101 Nb1 :b1001 Qb11111110 zb1001 "2b1 "<b1 "#1"'1*b0 "1b1 Tb1 $b1 I0110150-b0 9b1100000001 +b1 4b1 /b1 3b100000101 |0m1l1q0db1111 kb0 ub1100000001 bb1 pb1 ib1 ob111 ""b11110001100000001 jb111 ">b111 Hb111 #0";b11110001100000001 ;b111 O0[0"0b111 "/0\0P0M1"+1"31"=1)#20000"+0"30"=0)#2050b1001 "4b1010 K1";1"0b1001 Wb1001 !b1001 L1[1_1Pb1001 J1\b1111 a1"+1"31"=1)#21000"+0"30"=0)#2150b111 ".b111 Nb10110 "$b111 %0"b11011110111010101110100011100000111010101110100001000000111001100110011001011000111001100110010 .b10110 2b111 "%0"!b111001100110011001011000111001100110010 hb110010 wb10 vb11011110111010101110100011100000111010101110100001000000111001100110011001011000111001100110010 gb10110 nb10000000100000 eb1100100011010010111001101100001011000100110110001100101 fb111 :b111 Qb111 zb111 "2b111 "<b111 "#0"'0*b10 "1b111 Tb111 $b111 I1100051-b10 9b1100100000 +b100000 4b100000 /b100000 31m0l0q1db10110 kb10 ub1100100000 bb100000 pb100000 ib100000 ob101 ""b1100 |b101101001100100000 jb101 ">b101 Hb101 #0{0"&0";b101101001100100000 ;b101 O0}0[0"0b101 "/0'0\0_0P1"+1"31"=1)#22000"+0"30"=0)#2250b1010 "4b1011 K1";b1010 Wb1010 !b1010 L1[1]b1010 J1\b10110 a1"+1"31"=1)#23000"+0"30"=0)#2350b1001 ".b11010 "$1Eb1001 Nb110101001110101011011010111000000100000001000000010000000100000001100000011000001100011 .b11010 2b1001 %b111001100111000001011000111001100110000 hb110101001110101011011010111000000100000001000000010000000100000001100000011000001100011 gb1100000011000001100011 yb110000 wb0 vb1100 xb11010 nb1001 "%bx |b1001 zbx ""b1001 "<b1001 "#bx ">bx Hbx #b1001 Tb1001 Ib1001 $bx Ob1001 Qbx "/b1001 "2x"&1"(b1000 "-b0 "1b10 ")16b1000 8b0 9b1100 +b1100 4b10 7b10 ,b1100 /b1100 31rb11010 kb1000 tb0 ub1100 bb1100 pb10 sb10 cb1100 ib1100 ob110101100000001100 j0";b110101100000001100 ;b1001 :0[0\0]1"+1"31"=1)#24000"+0"30"=0)#2450b1011 "4b1100 K1";b1011 Wb1011 !b1011 L1[b1011 J1\b11010 a1"+1"31"=1)#25000"+0"30"=0)#25501"1"!b11 ".b10000 "$0Eb11 Nb10100001101110001011110110000100101001 .b10000 2b11 %b111001100110010001011000011000001100001 hb1100001 wb1010 vb111101000100000 eb10100001101110001011110110000100101001 gb10000 nb11 "%0"&b10001 |b111 ""b111 ">b111 Hb111 #b1010 :b111 Ob1010 zb111 "/b1010 "<b1100 Kb1010 "#b10 "-b1011 Lb1010 Tb1 ")1*b1010 $b1010 I⌨️ 快捷键说明
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