shiftreg.asm.qmsg

verilog实现shiftreg

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Assembler " "Info: Running Quartus II Assembler" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Web Edition " "Info: Version 4.0 Build 214 3/25/2004 Service Pack 1 SJ Web Edition" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Aug 13 16:28:06 2004 " "Info: Processing started: Fri Aug 13 16:28:06 2004" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_asm --lower_priority --import_settings_files=off --export_settings_files=off shiftreg -c shiftreg " "Info: Command: quartus_asm --lower_priority --import_settings_files=off --export_settings_files=off shiftreg -c shiftreg" {  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Assembler 0 s 0 s " "Info: Quartus II Assembler was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Fri Aug 13 16:28:13 2004 " "Info: Processing ended: Fri Aug 13 16:28:13 2004" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:06 " "Info: Elapsed time: 00:00:06" {  } {  } 0}  } {  } 0}