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来自「verilog设计范例」· 代码 · 共 11 行

# Reading C:/Program Files/VModeltech_5.5e/win32/../tcl/vsim/pref.tcl 
#  OpenFile E:/PROGRA~1/工程/veriog/source/chap10/block2.v 
vlog -reportprogress 300 -work work {E:/Program Files/工程/veriog/source/chap10/block2.v}
# Model Technology ModelSim SE vlog 5.5e Compiler 2001.10 Oct  2 2001
# ERROR: Could not open library work at work: No such file or directory
vlog -reportprogress 300 -work std {E:/Program Files/工程/veriog/source/chap10/block2.v}
# Model Technology ModelSim SE vlog 5.5e Compiler 2001.10 Oct  2 2001
# -- Compiling module block2
# Top level modules:
# 	block2