dct_1d.fit.summary

来自「一维DCT变换的verilog源码」· SUMMARY 代码 · 共 15 行

Fitter Status : Successful - Fri Jun 22 11:07:52 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : dct_1d
Top-level Entity Name : dct_1d
Family : Cyclone II
Device : EP2C35F672C6
Timing Models : Final
Total logic elements : 1,580 / 33,216 ( 5 % )
Total registers : 207
Total pins : 56 / 475 ( 12 % )
Total virtual pins : 0
Total memory bits : 0 / 483,840 ( 0 % )
Embedded Multiplier 9-bit elements : 0 / 70 ( 0 % )
Total PLLs : 0 / 4 ( 0 % )