jpeg_decode_fsm.v

jpeg格式到bmp格式的硬件实现

//---------------------------------------------------------------------------
// File Name	: jpeg_decode_fsm.v
// Module Name	: jpeg_decode_fsm
// Description	: Decode Maker
// Project		: JPEG Decoder
// Belong to	: 
// Author		: H.Ishihara
// E-Mail		: [e-mail]
// HomePage		: http://www.sweetcafe.jp/
// Date			: 2007/04/11
// Rev.			: 1.03
//---------------------------------------------------------------------------
// Rev. Date		 Description
//---------------------------------------------------------------------------
// 1.01 2006/10/01 1st Release
// 1.02 2006/10/04 Remove a HmOldData register.
//						When reset, clear a ReadDqtTable register.
// 1.03 2007/04/11 Remove JpegDecodeStart
//                 Exchange StateMachine(Add ImageData)
//                 Remove JpegDecodeStart
//---------------------------------------------------------------------------
// $Id: 
//---------------------------------------------------------------------------
`timescale 1ps / 1ps
	
module jpeg_decode_fsm
	(
	rst,
	clk,

	// From FIFO
	DataInEnable,
	DataIn,

	JpegDecodeIdle,		// Deocdeer Process Idle(1:Idle, 0:Run)

	OutWidth,
	OutHeight,
	OutBlockWidth,
	OutEnable,
	OutPixelX,
	OutPixelY,
	
	//
	DqtEnable,
	DqtTable,
	DqtCount,
	DqtData,

	//
	DhtEnable,
	DhtTable,
	DhtCount,
	DhtData,

	//
	HaffumanEnable,
	HaffumanTable,
	HaffumanCount,
	HaffumanData,
	HaffumanStart,

	//
	ImageEnable,
	ImageEnd,
	EnableFF00,
	
	//
	UseByte,
	UseWord
	);

	input			 rst;
	input			 clk;

	input 			DataInEnable;
	input [31:0]	DataIn;
	
	output			JpegDecodeIdle;

	output [15:0]	OutWidth;
	output [15:0]	OutHeight;
	output [11:0]	OutBlockWidth;
	input			OutEnable;
	input [15:0]	OutPixelX;
	input [15:0]	OutPixelY;
	
	output 			DqtEnable;
	output 			DqtTable;
	output [5:0]	DqtCount;
	output [7:0]	DqtData;

	output 			DhtEnable;
	output [1:0]	DhtTable;
	output [7:0]	DhtCount;
	output [7:0]	DhtData;

	//
	output 			HaffumanEnable;
	output [1:0]	HaffumanTable;
	output [3:0]	HaffumanCount;
	output [15:0]	HaffumanData;
	output [7:0]	HaffumanStart;
	
	//
	output 			ImageEnable;
	input 			ImageEnd;
	output 			EnableFF00;
	
	//
	output 			UseByte;
	output 			UseWord;


	//--------------------------------------------------------------------------
	// Read Maker from Jpeg Data
	//--------------------------------------------------------------------------
	reg [1:0]		State;
	reg [3:0]		Process;
	wire			StateReadByte;
	wire			StateReadWord;
	wire			ImageEnable;

	wire			ReadSegmentEnd;

	parameter		Idle		= 2'b00;
	parameter		GetMarker	= 2'b01;
	parameter		ReadSegment	= 2'b10;
	parameter		ImageData	= 2'b11;

	parameter		NoProcess	= 4'h0;
	parameter		SegSOI		= 4'h1;
	parameter		SegAPP		= 4'h2;
	parameter		SegDQT		= 4'h3;
	parameter		SegDHT		= 4'h4;
	parameter		SegSOF0		= 4'h5;
	parameter		SegSOS		= 4'h6;
	parameter		SegDRI		= 4'h7;
	parameter		SegRST		= 4'h8;
	parameter		SegEOI		= 4'h9;
	
	reg [15:0]		JpegWidth;
	reg [15:0]		JpegHeight;

	always @(posedge clk or negedge rst) begin
		if(!rst) begin
			State		<= Idle;
			Process		<= NoProcess;
		end else begin
			case(State)
				Idle: begin
					if(DataInEnable == 1'b1) begin
						State	<= GetMarker;
					end
					Process		<= NoProcess;
				end
				GetMarker: begin
					if(DataInEnable == 1'b1) begin
						State	<= ReadSegment;
						case(DataIn[31:16])
						16'hFFD8: begin		// SOI Segment
							Process <= SegSOI;
						end
						16'hFFE0: begin		// APP0 Segment
							Process <= SegAPP;
						end
						16'hFFDB: begin		// DQT Segment
							Process <= SegDQT;
						end
						16'hFFC4: begin		// DHT Segment
							Process <= SegDHT;
						end
						16'hFFC0: begin		// SOF0 Segment
							Process <= SegSOF0;
						end
						16'hFFDA: begin		// SOS Segment
							Process <= SegSOS;
						end
						//16'hFFDD: begin	// DRI Segment
						//	Process <= SegDRI;
						//end
						//16'hFFDx: begin	// RSTn Segment
						//	Process <= SegRST;
						//end
						//16'hFFD9: begin	// EOI Segment
						//	Process <= SegEOI;
						//end
						default: begin
							Process <= SegAPP;
						end
						endcase
					end
				end
				ReadSegment: begin
					if(ReadSegmentEnd == 1'b1) begin
						Process <= NoProcess;
						if(Process == SegSOS) begin
							State	<= ImageData;
						end else begin
							State	<= GetMarker;
						end
					end
				end
				ImageData: begin
					if(OutEnable & (JpegWidth == OutPixelX +1) & (JpegHeight == OutPixelY +1)) begin
						State	 <= Idle;
					end
				end
			endcase
		end
	end

	assign JpegDecodeIdle	= (State == Idle);
	assign StateReadByte	= 1'b0;
	assign StateReadWord	= ((State == GetMarker) & (DataInEnable == 1'b1));
	assign ImageEnable		= (State == ImageData);

	wire	ReadNopEnd;

	assign	ReadNopEnd = ((Process == SegSOI) | (Process == SegRST));
	
	//--------------------------------------------------------------------------
	// APP Segment
	// Skip read data!
	//--------------------------------------------------------------------------

	reg [1:0]	StateAPP;
	reg [15:0]	ReadAppCount;
	wire		ReadAppByte;
	wire		ReadAppWord;
	wire		ReadAppEnd;

	parameter	AppIdle		= 2'd0;
	parameter	AppLength	= 2'd1;
	parameter	AppRead		= 2'd2;
	
	always @(posedge clk or negedge rst) begin
		if(!rst) begin
			StateAPP		<= AppIdle;
			ReadAppCount	<= 16'd0;
		end else begin
			case(StateAPP)
				AppIdle: begin
					if(Process == SegAPP) StateAPP <= AppLength;
					ReadAppCount <= 16'd0;
				end
				AppLength: begin
					if(DataInEnable == 1'b1) begin
						ReadAppCount	<= DataIn[31:16] -2;
						StateAPP		<= AppRead;
					end
				end
				AppRead: begin
					if(DataInEnable == 1'b1) begin
						if(ReadAppCount == 1) begin
							StateAPP		<= AppIdle;
						end else begin
							ReadAppCount	<= ReadAppCount -1;
						end
					end
				end
			endcase
		end
	end
	assign ReadAppByte	= (StateAPP == AppRead);
	assign ReadAppWord	= (StateAPP == AppLength);
	assign ReadAppEnd	= ((StateAPP == AppRead) & (DataInEnable == 1'b1) & (ReadAppCount == 1));
	
	//--------------------------------------------------------------------------
	// DQT Segment
	//--------------------------------------------------------------------------

	reg [1:0]	 StateDQT;
	reg [15:0]	ReadDqtCount;
	wire			ReadDqtByte;
	wire			ReadDqtWord;
	wire			ReadDqtEnd;
	wire			ReadDqtEnable;
	wire [7:0]	ReadDqtData;
	reg			 ReadDqtTable;

	parameter	 DQTIdle	= 2'b00;
	parameter	 DQTLength = 2'b01;
	parameter	 DQTTable	= 2'b10;
	parameter	 DQTRead	= 2'b11;
	
	always @(posedge clk or negedge rst) begin
		if(!rst) begin
			StateDQT		<= DQTIdle;
			ReadDqtCount	<= 16'h0000;
	 ReadDqtTable	<= 1'b0;
		end else begin
			case(StateDQT)
				DQTIdle: begin
					if(Process == SegDQT) begin
						StateDQT <= DQTLength;
					end
					ReadDqtCount	<= 16'h0000;
				end
				DQTLength: begin
					if(DataInEnable == 1'b1) begin
						StateDQT		<= DQTTable;
						ReadDqtCount <= DataIn[31:16] -2;
					end
				end
				DQTTable: begin
					if(DataInEnable == 1'b1) begin
						StateDQT		<= DQTRead;
						ReadDqtTable <= DataIn[24];
						ReadDqtCount <= 16'd0;
					end
				end
				DQTRead: begin
					if(DataInEnable == 1'b1) begin
						if(ReadDqtCount ==63) begin
							StateDQT		<= DQTIdle;
						end
						ReadDqtCount	<= ReadDqtCount +1;
					end
				end
			endcase