entries

一个verilog实现的crc校验

/CRC_top.vhd/1.1.1.1/Sun Jan 25 11:28:56 2004//
/CRC_top_syn.vhd/1.1.1.1/Sun Jan 25 11:28:39 2004//
/CRC_top_syn_tb.vhd/1.1.1.1/Sun Jan 25 11:28:18 2004//
/CRC_top_tb.vhd/1.1.1.1/Sun Jan 25 11:28:51 2004//
/CRC_top_tb_ceros.vhd/1.1.1.1/Sun Jan 25 11:28:41 2004//
/big_xor.vhd/1.1.1.1/Sun Jan 25 11:28:55 2004//
/big_xor_tb.vhd/1.1.1.1/Sun Jan 25 11:28:40 2004//
/crc_modif.vhd/1.1.1.1/Sun Jan 25 11:28:55 2004//
/crc_top.vhd/1.1.1.1/Sun Jan 25 11:28:51 2004//
/ff_reset.vhd/1.1.1.1/Sun Jan 25 11:28:40 2004//
/gf_multiplier.vhd/1.1.1.1/Sun Jan 25 11:28:48 2004//
/gf_multiplier_tb.vhd/1.1.1.1/Sun Jan 25 11:28:40 2004//
/gf_registers.vhd/1.1.1.1/Sun Jan 25 11:28:46 2004//
/gf_xor.vhd/1.1.1.1/Sun Jan 25 11:28:43 2004//
/input_registers.vhd/1.1.1.1/Sun Jan 25 11:28:42 2004//
/input_wait.vhd/1.1.1.1/Sun Jan 25 11:28:41 2004//
/input_wait_bak.vhd/1.1.1.1/Sun Jan 25 11:28:18 2004//
/input_wait_tb.vhd/1.1.1.1/Sun Jan 25 11:28:40 2004//
D