vhd2vl.y

將VHDL設計轉換成Verilog設計的程式

/*
    vhd2vl v 1.0
    VHDL to Verilog RTL translator
    Copyright (C) 2001 Vincenzo Liguori - Ocean Logic Pty Ltd - http://www.ocean-logic.com
    Send comments and bugs at : [e-mail]

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
*/

%{
#include <stdio.h>
#include <string.h>
#include "def.h"

int lineno=1;
sglist *io_list=NULL;
sglist *sig_list=NULL;
sglist *type_list=NULL;
char *clkname;
char clkedge;
int delay=1;
int dolist=1;
int np=1;
char wire[]="wire ";
char reg[]="reg ";
int dowith=0;
slist *slwith;
slist *others0=NULL;
slist *others1=NULL;
char *oth0="{1'b0}}";
char *oth1="{1'b1}}";

/* Indentation variables */
int indent=0;
slist *indents[MAXINDENT];

slist *addtxt(slist *sl, char *s){
  slist *p;

  if(s == NULL)
    return sl;

  p = (slist *)malloc(sizeof(slist));
  p->type = 1;
  p->slst = sl;
  p->data.txt = s;

  return p;
}

slist *addptxt(slist *sl, char **s){
  slist *p;

  if(s == NULL)
    return sl;

  p = (slist *)malloc(sizeof(slist));
  p->type = 3;
  p->slst = sl;
  p->data.ptxt = s;

  return p;
}

slist *addval(slist *sl, int val){
  slist *p;

  p = (slist *)malloc(sizeof(slist));
  p->type = 2;
  p->slst = sl;
  p->data.val = val;

  return p;
}

slist *addsl(slist *sl, slist *sl2){
  slist *p;

  if(sl2 == NULL)
    return sl;

  p = (slist *)malloc(sizeof(slist));
  p->type = 0;
  p->slst = sl;
  p->data.sl = sl2;

  return p;
}

slist *addvec(slist *sl, char *s){
  sl=addval(sl,strlen(s));
  sl=addtxt(sl,"'b ");
  sl=addtxt(sl,s);
  return sl;
}

slist *addind(slist *sl){
  if(sl)
    sl=addsl(indents[indent],sl);
  return sl;
}

slist *addpar(slist *sl, vrange *v){
  if(v->hi>-2){
    sl=addtxt(sl,"[");
    if(v->hi>-1){
      sl=addval(sl,v->hi);
      sl=addtxt(sl,":");
    }
    sl=addval(sl,v->lo);
    sl=addtxt(sl,"] ");
  } else
    sl=addtxt(sl," ");
  return sl;
}

slist *addwrap(char *l,slist *sl,char *r){
slist *s;
  s=addtxt(NULL,l);
  s=addsl(s,sl);
  return addtxt(s,r);
}

sglist *lookup(sglist *sg,char *s){
  for(;;){
    if(sg == NULL || strcmp(sg->name,s)==0)
      return sg;
    sg=sg->next;
  }
}

char *bottom(slist *sl){
  while(sl->slst != NULL)
    sl=sl->slst;
  return sl->data.txt;
}

int prec(char op){
  switch(op){
  case 't':
    return 8;
    break;
  case '~':
    return 7;
    break;
  case 'p': case 'm':
    return 6;
    break;
  case '*': case '/':
    return 5;
    break;
  case '+': case '-':
    return 4;
    break;
  case '&':
    return 3;
    break;
  case '^':
    return 2;
    break;
  case '|':
    return 1;
    break;
   default:
    return 0;
    break; 
  }
}

expdata *addexpr(expdata *expr1,char op,char* opstr,expdata *expr2){
slist *sl1,*sl2;
  if(expr1 == NULL)
    sl1=NULL;
  else if(expr1->op == 'c')
    sl1=addwrap("{",expr1->sl,"}");
  else if(prec(expr1->op) < prec(op))
    sl1=addwrap("(",expr1->sl,")");
  else
    sl1=expr1->sl;

  if(expr2->op == 'c')
    sl2=addwrap("{",expr2->sl,"}");
  else if(prec(expr2->op) < prec(op))
    sl2=addwrap("(",expr2->sl,")");
  else
    sl2=expr2->sl;

  if(expr1 == NULL)
    expr1=expr2;
  else
    free(expr2);

  expr1->op=op;
  sl1=addtxt(sl1,opstr);
  sl1=addsl(sl1,sl2);
  expr1->sl=sl1;
  return expr1;
}

void slprint(slist *sl){

  if(sl){
    slprint(sl->slst);
    switch(sl->type){
    case 0 :
      slprint(sl->data.sl);
      break;
    case 1 :
      printf("%s",sl->data.txt);
      break;
    case 2 :
      printf("%d",sl->data.val);
      break;
    case 3 :
      printf("%s",*(sl->data.ptxt));
      break;
    }
  }
}

void slfree(slist *sl){

  if(sl){
    slfree(sl->slst);
    switch(sl->type){
    case 0 :
      slfree(sl->data.sl);
      break;
    case 1 :
      free(sl->data.txt);
      break;
    }
    free(sl);
  }
}

void fslprint(FILE *fp,slist *sl){

  if(sl){
    fslprint(fp,sl->slst);
    switch(sl->type){
    case 0 :
      fslprint(fp,sl->data.sl);
      break;
    case 1 :
      fprintf(fp,"%s",sl->data.txt);
      break;
    case 2 :
      fprintf(fp,"%d",sl->data.val);
      break;
    case 3 :
      fprintf(fp,"%s",*(sl->data.txt));
      break;
    }
  }
}

void fixothers(slval *sgin,slist *sl){
sglist *sg;
int size;

  if(sl->slst){
  /*
    fprintf(stderr,"\n------------------------------\n");
    fprintf(stderr,"Signal %s\n",sgin->sl->data.txt);
  */
    if(sgin->val>0)
      size=sgin->val;
    else{
      if((sg=lookup(io_list,sgin->sl->data.txt))==NULL)
        sg=lookup(sig_list,sgin->sl->data.txt);
      if(sg)
        if(sg->range->hi<0)
          size=1;
        else
          size=abs(sg->range->hi-sg->range->lo)+1;
    }
  /*
    fprintf(stderr,"Size %d\n",size);
    fprintf(stderr,"Ptr %d\n",(int) others1);
  */
    sl->slst->slst->data.val=size;
    sl->data.sl->slst->data.val=size;
  /*
    fslprint(stderr,others1);
  */
  }
}

%}

%union {
  char * txt;  /* String */
  int n; /* Value */
  vrange *v; /* Signal range */
  sglist *sg; /* Signal list */
  slist *sl; /* String list */
  expdata *e; /* Expression structure */
  slval *ss; /* Signal structure */
}

%token <txt> REM ENTITY IS PORT IN OUT MAP
%token <txt> BIT BITVECT DOWNTO TO TYPE END
%token <txt> ARCHITECTURE COMPONENT OF
%token <txt> SIGNAL BEGN NOT WHEN WITH
%token <txt> SELECT OTHERS PROCESS VARIABLE CONSTANT
%token <txt> IF THEN ELSIF ELSE CASE
%token <txt> AFTER AND OR XOR UNIT
%token <txt> LASTVALUE EVENT POSEDGE NEGEDGE
%token <txt> STRING NAME NULLV
%token <n> NATURAL

%type <n> trad
%type <sl> rem  remlist entity
%type <sl> portlist architecture
%type <sl> a_decl a_body p_decl oname
%type <sl> map_list map_item sigvalue
%type <sl> conf exprc sign_list p_body optname
%type <sl> elsepart wlist wvalue cases
%type <sl> with_item with_list doothers
%type <sg> s_list
%type <n> dir delay
%type <v> type vec_range
%type <e> expr
%type <ss> signal

%right '='
/* Logic operators: */
%left ORL
%left ANDL
/* Binary operators: */
%left OR
%left XOR
%left AND
/* Comparison: */
%left '<', '>', BIGEQ, LESSEQ, NOTEQ, EQUAL
%left  '+', '-', '&'
%left  '*', '/'
%right UMINUS, UPLUS, NOTL, NOT
%%

/* Input file must contain entity declaration followed by architecture */
trad  : rem entity rem architecture rem {
        slist *sl;
          sl=addsl($1,$2);
          sl=addsl(sl,$3);
          sl=addsl(sl,$4);
          sl=addsl(sl,$5);
          sl=addtxt(sl,"\nendmodule\n");
          slprint(sl);
          $$=0;
        }
      ;

/* Comments */
rem      : /* Empty */ {$$=NULL; }
         | remlist {$$=$1; }
         ;

remlist  : REM {$$=addtxt(indents[indent],$1);}
         | REM remlist {
           slist *sl;
           sl=addtxt(indents[indent],$1);
           $$=addsl(sl,$2);}
         ;

/* Entity */
entity    : ENTITY NAME IS PORT '(' rem portlist ')' ';' rem END NAME ';' {
            slist *sl;
            sglist *p;
	      sl=addtxt(NULL,"\nmodule ");
              sl=addtxt(sl,$2);
              sl=addtxt(sl,"(\n");
              /* Add the signal list */
              p=io_list;
              for(;;){
                sl=addtxt(sl,p->name);
                p=p->next;
                if(p)
                  sl=addtxt(sl,",\n");
                else{
                  sl=addtxt(sl,"\n");
                  break;
                }
              }
              sl=addtxt(sl,");\n\n");
              sl=addsl(sl,$6);
              sl=addsl(sl,$7);
              sl=addtxt(sl,"\n");
              p=io_list;
              do{
                sl=addptxt(sl,&(p->type));
                /*sl=addtxt(sl,p->type);*/
                sl=addtxt(sl," ");
                sl=addpar(sl,p->range);
                sl=addtxt(sl,p->name);
                sl=addtxt(sl,";\n");
                p=p->next;
              } while(p!=NULL);
              sl=addtxt(sl,"\n");
              sl=addsl(sl,$10);
              $$=addtxt(sl,"\n");
              free($12);
            }
          ;

portlist  : s_list ':' dir type rem {
            slist *sl;
            sglist *p;

	      if(dolist){
	        if($3)
                  sl=addtxt(NULL,"output");
                else
                  sl=addtxt(NULL,"input");

                sl=addpar(sl,$4);
                p=$1;
                for(;;){
                  sl=addtxt(sl,p->name);
                  p=p->next;
                  if(p==NULL)
                    break;
                  sl=addtxt(sl,", ");
                }
                sl=addtxt(sl,";\n");
                $$=addsl(sl,$5);
                io_list=p=$1;
                for(;;){
                  p->type=wire;
                  p->range=$4;
                  if(p->next==NULL)
                    break;
                  p=p->next;
                }
              } else{
                free($5);
                free($4);
              }
            }
          | s_list ':' dir type ';' rem portlist {
            slist *sl;
            sglist *p;

	      if(dolist){
	        if($3)
                  sl=addtxt(NULL,"output");
                else
                  sl=addtxt(NULL,"input");

                sl=addpar(sl,$4);
                p=$1;
                for(;;){
                  sl=addtxt(sl,p->name);