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defparam \inst4|altpll_component|pll .extclk3_multiply_by = 1;
defparam \inst4|altpll_component|pll .clk0_divide_by = 5;
defparam \inst4|altpll_component|pll .clk1_divide_by = 1;
defparam \inst4|altpll_component|pll .clk2_divide_by = 1;
defparam \inst4|altpll_component|pll .clk3_divide_by = 1;
defparam \inst4|altpll_component|pll .clk4_divide_by = 1;
defparam \inst4|altpll_component|pll .clk5_divide_by = 1;
defparam \inst4|altpll_component|pll .extclk0_divide_by = 1;
defparam \inst4|altpll_component|pll .extclk1_divide_by = 1;
defparam \inst4|altpll_component|pll .extclk2_divide_by = 1;
defparam \inst4|altpll_component|pll .extclk3_divide_by = 1;
defparam \inst4|altpll_component|pll .clk0_phase_shift = "0";
defparam \inst4|altpll_component|pll .clk1_phase_shift = "0";
defparam \inst4|altpll_component|pll .clk2_phase_shift = "0";
defparam \inst4|altpll_component|pll .clk3_phase_shift = "0";
defparam \inst4|altpll_component|pll .clk4_phase_shift = "0";
defparam \inst4|altpll_component|pll .clk5_phase_shift = "0";
defparam \inst4|altpll_component|pll .extclk0_phase_shift = "0";
defparam \inst4|altpll_component|pll .extclk1_phase_shift = "0";
defparam \inst4|altpll_component|pll .extclk2_phase_shift = "0";
defparam \inst4|altpll_component|pll .extclk3_phase_shift = "0";
defparam \inst4|altpll_component|pll .clk0_time_delay = "0";
defparam \inst4|altpll_component|pll .clk1_time_delay = "0";
defparam \inst4|altpll_component|pll .clk2_time_delay = "0";
defparam \inst4|altpll_component|pll .clk3_time_delay = "0";
defparam \inst4|altpll_component|pll .clk4_time_delay = "0";
defparam \inst4|altpll_component|pll .clk5_time_delay = "0";
defparam \inst4|altpll_component|pll .extclk0_time_delay = "0";
defparam \inst4|altpll_component|pll .extclk1_time_delay = "0";
defparam \inst4|altpll_component|pll .extclk2_time_delay = "0";
defparam \inst4|altpll_component|pll .extclk3_time_delay = "0";
defparam \inst4|altpll_component|pll .clk0_duty_cycle = 50;
defparam \inst4|altpll_component|pll .clk1_duty_cycle = 50;
defparam \inst4|altpll_component|pll .clk2_duty_cycle = 50;
defparam \inst4|altpll_component|pll .clk3_duty_cycle = 50;
defparam \inst4|altpll_component|pll .clk4_duty_cycle = 50;
defparam \inst4|altpll_component|pll .clk5_duty_cycle = 50;
defparam \inst4|altpll_component|pll .extclk0_duty_cycle = 50;
defparam \inst4|altpll_component|pll .extclk1_duty_cycle = 50;
defparam \inst4|altpll_component|pll .extclk2_duty_cycle = 50;
defparam \inst4|altpll_component|pll .extclk3_duty_cycle = 50;
defparam \inst4|altpll_component|pll .simulation_type = "timing";
// synopsys translate_on

// atom is at PIN_131
cyclone_io \rst~I (
	.datain(gnd),
	.oe(gnd),
	.outclk(gnd),
	.outclkena(vcc),
	.inclk(gnd),
	.inclkena(vcc),
	.areset(gnd),
	.sreset(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.devoe(devoe),
	.combout(\rst~combout ),
	.regout(),
	.padio(rst));
// synopsys translate_off
defparam \rst~I .operation_mode = "input";
defparam \rst~I .input_register_mode = "none";
defparam \rst~I .output_register_mode = "none";
defparam \rst~I .oe_register_mode = "none";
defparam \rst~I .input_async_reset = "none";
defparam \rst~I .output_async_reset = "none";
defparam \rst~I .oe_async_reset = "none";
defparam \rst~I .input_sync_reset = "none";
defparam \rst~I .output_sync_reset = "none";
defparam \rst~I .oe_sync_reset = "none";
defparam \rst~I .input_power_up = "low";
defparam \rst~I .output_power_up = "low";
defparam \rst~I .oe_power_up = "low";
// synopsys translate_on

// atom is at LC_X40_Y18_N5
cyclone_lcell \inst|hcnt[0]~I (
// Equation(s):
// \inst|hcnt[0]  = DFFEAS(!\inst|hcnt[0] , GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[0]~517  = CARRY(\inst|hcnt[0] )
// \inst|hcnt[0]~517COUT1_561  = CARRY(\inst|hcnt[0] )

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(vcc),
	.datab(\inst|hcnt[0] ),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[0] ),
	.cout(),
	.cout0(\inst|hcnt[0]~517 ),
	.cout1(\inst|hcnt[0]~517COUT1_561 ));
// synopsys translate_off
defparam \inst|hcnt[0]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[0]~I .synch_mode = "on";
defparam \inst|hcnt[0]~I .register_cascade_mode = "off";
defparam \inst|hcnt[0]~I .sum_lutc_input = "datac";
defparam \inst|hcnt[0]~I .lut_mask = "33CC";
defparam \inst|hcnt[0]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y18_N6
cyclone_lcell \inst|hcnt[1]~I (
// Equation(s):
// \inst|hcnt[1]  = DFFEAS(\inst|hcnt[1]  $ (\inst|hcnt[0]~517 ), GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[1]~529  = CARRY(!\inst|hcnt[0]~517  # !\inst|hcnt[1] )
// \inst|hcnt[1]~529COUT1_562  = CARRY(!\inst|hcnt[0]~517COUT1_561  # !\inst|hcnt[1] )

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(\inst|hcnt[1] ),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(\inst|hcnt[0]~517 ),
	.cin1(\inst|hcnt[0]~517COUT1_561 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[1] ),
	.cout(),
	.cout0(\inst|hcnt[1]~529 ),
	.cout1(\inst|hcnt[1]~529COUT1_562 ));
// synopsys translate_off
defparam \inst|hcnt[1]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[1]~I .synch_mode = "on";
defparam \inst|hcnt[1]~I .register_cascade_mode = "off";
defparam \inst|hcnt[1]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[1]~I .lut_mask = "5A5F";
defparam \inst|hcnt[1]~I .cin0_used = "true";
defparam \inst|hcnt[1]~I .cin1_used = "true";
defparam \inst|hcnt[1]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y18_N7
cyclone_lcell \inst|hcnt[2]~I (
// Equation(s):
// \inst|hcnt[2]  = DFFEAS(\inst|hcnt[2]  $ (!\inst|hcnt[1]~529 ), GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[2]~533  = CARRY(\inst|hcnt[2]  & (!\inst|hcnt[1]~529 ))
// \inst|hcnt[2]~533COUT1_563  = CARRY(\inst|hcnt[2]  & (!\inst|hcnt[1]~529COUT1_562 ))

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(\inst|hcnt[2] ),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(\inst|hcnt[1]~529 ),
	.cin1(\inst|hcnt[1]~529COUT1_562 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[2] ),
	.cout(),
	.cout0(\inst|hcnt[2]~533 ),
	.cout1(\inst|hcnt[2]~533COUT1_563 ));
// synopsys translate_off
defparam \inst|hcnt[2]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[2]~I .synch_mode = "on";
defparam \inst|hcnt[2]~I .register_cascade_mode = "off";
defparam \inst|hcnt[2]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[2]~I .lut_mask = "A50A";
defparam \inst|hcnt[2]~I .cin0_used = "true";
defparam \inst|hcnt[2]~I .cin1_used = "true";
defparam \inst|hcnt[2]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y18_N8
cyclone_lcell \inst|hcnt[3]~I (
// Equation(s):
// \inst|hcnt[3]  = DFFEAS(\inst|hcnt[3]  $ \inst|hcnt[2]~533 , GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[3]~537  = CARRY(!\inst|hcnt[2]~533  # !\inst|hcnt[3] )
// \inst|hcnt[3]~537COUT1_564  = CARRY(!\inst|hcnt[2]~533COUT1_563  # !\inst|hcnt[3] )

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(vcc),
	.datab(\inst|hcnt[3] ),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(\inst|hcnt[2]~533 ),
	.cin1(\inst|hcnt[2]~533COUT1_563 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[3] ),
	.cout(),
	.cout0(\inst|hcnt[3]~537 ),
	.cout1(\inst|hcnt[3]~537COUT1_564 ));
// synopsys translate_off
defparam \inst|hcnt[3]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[3]~I .synch_mode = "on";
defparam \inst|hcnt[3]~I .register_cascade_mode = "off";
defparam \inst|hcnt[3]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[3]~I .lut_mask = "3C3F";
defparam \inst|hcnt[3]~I .cin0_used = "true";
defparam \inst|hcnt[3]~I .cin1_used = "true";
defparam \inst|hcnt[3]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y18_N9
cyclone_lcell \inst|hcnt[4]~I (
// Equation(s):
// \inst|hcnt[4]  = DFFEAS(\inst|hcnt[4]  $ (!\inst|hcnt[3]~537 ), GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[4]~525  = CARRY(\inst|hcnt[4]  & (!\inst|hcnt[3]~537COUT1_564 ))

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(\inst|hcnt[4] ),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(gnd),
	.cin0(\inst|hcnt[3]~537 ),
	.cin1(\inst|hcnt[3]~537COUT1_564 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[4] ),
	.cout(\inst|hcnt[4]~525 ),
	.cout0(),
	.cout1());
// synopsys translate_off
defparam \inst|hcnt[4]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[4]~I .synch_mode = "on";
defparam \inst|hcnt[4]~I .register_cascade_mode = "off";
defparam \inst|hcnt[4]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[4]~I .lut_mask = "A50A";
defparam \inst|hcnt[4]~I .cin0_used = "true";
defparam \inst|hcnt[4]~I .cin1_used = "true";
defparam \inst|hcnt[4]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y17_N0
cyclone_lcell \inst|hcnt[5]~I (
// Equation(s):
// \inst|hcnt[5]  = DFFEAS(\inst|hcnt[5]  $ \inst|hcnt[4]~525 , GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[5]~545  = CARRY(!\inst|hcnt[4]~525  # !\inst|hcnt[5] )
// \inst|hcnt[5]~545COUT1_565  = CARRY(!\inst|hcnt[4]~525  # !\inst|hcnt[5] )

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(vcc),
	.datab(\inst|hcnt[5] ),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(\inst|hcnt[4]~525 ),
	.cin0(gnd),
	.cin1(vcc),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[5] ),
	.cout(),
	.cout0(\inst|hcnt[5]~545 ),
	.cout1(\inst|hcnt[5]~545COUT1_565 ));
// synopsys translate_off
defparam \inst|hcnt[5]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[5]~I .synch_mode = "on";
defparam \inst|hcnt[5]~I .register_cascade_mode = "off";
defparam \inst|hcnt[5]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[5]~I .lut_mask = "3C3F";
defparam \inst|hcnt[5]~I .cin_used = "true";
defparam \inst|hcnt[5]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y17_N1
cyclone_lcell \inst|hcnt[6]~I (
// Equation(s):
// \inst|hcnt[6]  = DFFEAS(\inst|hcnt[6]  $ (!(!\inst|hcnt[4]~525  & \inst|hcnt[5]~545 ) # (\inst|hcnt[4]~525  & \inst|hcnt[5]~545COUT1_565 )), GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[6]~541  = CARRY(\inst|hcnt[6]  & (!\inst|hcnt[5]~545 ))
// \inst|hcnt[6]~541COUT1_566  = CARRY(\inst|hcnt[6]  & (!\inst|hcnt[5]~545COUT1_565 ))

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(\inst|hcnt[6] ),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(\inst|hcnt[4]~525 ),
	.cin0(\inst|hcnt[5]~545 ),
	.cin1(\inst|hcnt[5]~545COUT1_565 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[6] ),
	.cout(),
	.cout0(\inst|hcnt[6]~541 ),
	.cout1(\inst|hcnt[6]~541COUT1_566 ));
// synopsys translate_off
defparam \inst|hcnt[6]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[6]~I .synch_mode = "on";
defparam \inst|hcnt[6]~I .register_cascade_mode = "off";
defparam \inst|hcnt[6]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[6]~I .lut_mask = "A50A";
defparam \inst|hcnt[6]~I .cin_used = "true";
defparam \inst|hcnt[6]~I .cin0_used = "true";
defparam \inst|hcnt[6]~I .cin1_used = "true";
defparam \inst|hcnt[6]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y17_N2
cyclone_lcell \inst|hcnt[7]~I (
// Equation(s):
// \inst|hcnt[7]  = DFFEAS(\inst|hcnt[7]  $ ((!\inst|hcnt[4]~525  & \inst|hcnt[6]~541 ) # (\inst|hcnt[4]~525  & \inst|hcnt[6]~541COUT1_566 )), GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[7]~549  = CARRY(!\inst|hcnt[6]~541  # !\inst|hcnt[7] )
// \inst|hcnt[7]~549COUT1_567  = CARRY(!\inst|hcnt[6]~541COUT1_566  # !\inst|hcnt[7] )

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(\inst|hcnt[7] ),
	.datab(vcc),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(\inst|hcnt[4]~525 ),
	.cin0(\inst|hcnt[6]~541 ),
	.cin1(\inst|hcnt[6]~541COUT1_566 ),
	.inverta(gnd),
	.regcascin(gnd),
	.devclrn(devclrn),
	.devpor(devpor),
	.combout(),
	.regout(\inst|hcnt[7] ),
	.cout(),
	.cout0(\inst|hcnt[7]~549 ),
	.cout1(\inst|hcnt[7]~549COUT1_567 ));
// synopsys translate_off
defparam \inst|hcnt[7]~I .operation_mode = "arithmetic";
defparam \inst|hcnt[7]~I .synch_mode = "on";
defparam \inst|hcnt[7]~I .register_cascade_mode = "off";
defparam \inst|hcnt[7]~I .sum_lutc_input = "cin";
defparam \inst|hcnt[7]~I .lut_mask = "5A5F";
defparam \inst|hcnt[7]~I .cin_used = "true";
defparam \inst|hcnt[7]~I .cin0_used = "true";
defparam \inst|hcnt[7]~I .cin1_used = "true";
defparam \inst|hcnt[7]~I .output_mode = "reg_only";
// synopsys translate_on

// atom is at LC_X40_Y17_N3
cyclone_lcell \inst|hcnt[8]~I (
// Equation(s):
// \inst|hcnt[8]  = DFFEAS(\inst|hcnt[8]  $ !(!\inst|hcnt[4]~525  & \inst|hcnt[7]~549 ) # (\inst|hcnt[4]~525  & \inst|hcnt[7]~549COUT1_567 ), GLOBAL(\inst4|altpll_component|_clk0 ), GLOBAL(\rst~combout ), , , , , \inst|LessThan~4997 , )
// \inst|hcnt[8]~553  = CARRY(\inst|hcnt[8]  & !\inst|hcnt[7]~549 )
// \inst|hcnt[8]~553COUT1_568  = CARRY(\inst|hcnt[8]  & !\inst|hcnt[7]~549COUT1_567 )

	.clk(\inst4|altpll_component|_clk0 ),
	.dataa(vcc),
	.datab(\inst|hcnt[8] ),
	.datac(vcc),
	.datad(vcc),
	.aclr(!\rst~combout ),
	.aload(gnd),
	.sclr(\inst|LessThan~4997 ),
	.sload(gnd),
	.ena(vcc),
	.cin(\inst|hcnt[4]~525 ),
	.cin0(\inst|hcnt[7]~549 ),
	.cin1(\inst|hcnt[7]~549COUT1_567 ),
12345

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