pmc3386_tx_pl3.v

VERILOG五POSPHY LEVEL3电路描述

  else if(ch2_fifo_sop)
    begin
      ch2_pkt_unfinished <=1'b1;
    end
  else if(ch2_fifo_eop)
    begin
      ch2_pkt_unfinished <=1'b0;
    end
  else
    begin
      ch2_pkt_unfinished <=ch2_pkt_unfinished;
    end
end

//ch3_pkt_unfinished
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch3_pkt_unfinished <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      ch3_pkt_unfinished <=1'b0;
    end
  else if(ch3_fifo_sop && ch3_fifo_eop)
    begin
      ch3_pkt_unfinished <=1'b0;
    end  
  else if(ch3_fifo_sop)
    begin
      ch3_pkt_unfinished <=1'b1;
    end
  else if(ch3_fifo_eop)
    begin
      ch3_pkt_unfinished <=1'b0;
    end
  else
    begin
      ch3_pkt_unfinished <=ch3_pkt_unfinished;
    end
end



//rden_tmp
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch0_fifo_rden<=1'b0;
      ch1_fifo_rden<=1'b0;
      ch2_fifo_rden<=1'b0;
      ch3_fifo_rden<=1'b0; 
      
      ch_id_for_b1<=2'b0; 
    end
  else if(~s_reset_n)
    begin
      ch0_fifo_rden<=1'b0;
      ch1_fifo_rden<=1'b0;
      ch2_fifo_rden<=1'b0;
      ch3_fifo_rden<=1'b0;
      
      ch_id_for_b1<=2'b0;  
    end
  else 
    begin
      case(ch_id_for_b1[1:0])
        2'b00: begin
                 if(ch0_fifo_eop)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b01;  
                   end
                 else if(ch0_fifo_aval && b1_dav && b1_dav_d)
                   begin
                     ch0_fifo_rden<=1'b1;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b00;  
                   end
                 else if(ch0_pkt_unfinished)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b00;  
                   end
                 else
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b01;  
                   end
               end
        2'b01: begin
                 if(ch1_fifo_eop)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b10;  
                   end
                 else if(ch1_fifo_aval && b1_dav && b1_dav_d)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b1;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b01;  
                   end
                 else if(ch1_pkt_unfinished)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b01;  
                   end
                 else
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b10;  
                   end
               end
        2'b10: begin
                 if(ch2_fifo_eop)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b11;  
                   end
                 else if(ch2_fifo_aval && b1_dav && b1_dav_d)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b1;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b10;  
                   end
                 else if(ch2_pkt_unfinished)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b10;  
                   end
                 else
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b11;  
                   end
               end
        2'b11: begin
                 if(ch3_fifo_eop)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b00;  
                   end
                 else if(ch3_fifo_aval && b1_dav && b1_dav_d)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b1;
      
                     ch_id_for_b1<=2'b11;  
                   end
                 else if(ch3_pkt_unfinished)
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b11;  
                   end
                 else
                   begin
                     ch0_fifo_rden<=1'b0;
                     ch1_fifo_rden<=1'b0;
                     ch2_fifo_rden<=1'b0;
                     ch3_fifo_rden<=1'b0;
      
                     ch_id_for_b1<=2'b00;  
                   end
                 end
        default: begin                 
                   ch0_fifo_rden<=1'b0;
                   ch1_fifo_rden<=1'b0;
                   ch2_fifo_rden<=1'b0;
                   ch3_fifo_rden<=1'b0;
      
                   ch_id_for_b1<=2'b00;  
                 end
    endcase
  end
end

//rden
//assign ch0_fifo_rden = ch0_fifo_rden_tmp && ~ch0_fifo_eop;
//assign ch1_fifo_rden = ch1_fifo_rden_tmp && ~ch1_fifo_eop;
//assign ch2_fifo_rden = ch2_fifo_rden_tmp && ~ch2_fifo_eop;
//assign ch3_fifo_rden = ch3_fifo_rden_tmp && ~ch3_fifo_eop;

//ch0_fifo_rden_d,1,2,3
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch0_fifo_rden_d <=1'b0;
      ch1_fifo_rden_d <=1'b0;
      ch2_fifo_rden_d <=1'b0;
      ch3_fifo_rden_d <=1'b0;
      
      ch0_fifo_rden_2d <=1'b0;
      ch1_fifo_rden_2d <=1'b0;
      ch2_fifo_rden_2d <=1'b0;
      ch3_fifo_rden_2d <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      ch0_fifo_rden_d <=1'b0;
      ch1_fifo_rden_d <=1'b0;
      ch2_fifo_rden_d <=1'b0;
      ch3_fifo_rden_d <=1'b0;
      
      ch0_fifo_rden_2d <=1'b0;
      ch1_fifo_rden_2d <=1'b0;
      ch2_fifo_rden_2d <=1'b0;
      ch3_fifo_rden_2d <=1'b0; 
    end
  else
    begin
      ch0_fifo_rden_d <=ch0_fifo_rden;
      ch1_fifo_rden_d <=ch1_fifo_rden;
      ch2_fifo_rden_d <=ch2_fifo_rden;
      ch3_fifo_rden_d <=ch3_fifo_rden;
      
      ch0_fifo_rden_2d <=ch0_fifo_rden_d;
      ch1_fifo_rden_2d <=ch1_fifo_rden_d;
      ch2_fifo_rden_2d <=ch2_fifo_rden_d;
      ch3_fifo_rden_2d <=ch3_fifo_rden_d;
    end
end

//b1_ena
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      b1_ena <=1'b0;
      b1_dat <=32'b0;
      b1_sop <=1'b0;
      b1_eop <=1'b0;
      b1_err <=1'b0;
      b1_par <=1'b0;
      b1_mty <=2'b0;  
    end
  else if(~s_reset_n)
    begin
      b1_ena <=1'b0;
      b1_dat <=32'b0;
      b1_sop <=1'b0;
      b1_eop <=1'b0;
      b1_err <=1'b0;
      b1_par <=1'b0;
      b1_mty <=2'b0; 
    end
  else if(ch0_fifo_rden && ch0_fifo_rden_2d)
    begin
      b1_ena <=1'b1;
      b1_dat <=ch0_fifo_data;
      b1_sop <=ch0_fifo_sop;
      b1_eop <=ch0_fifo_eop;
      b1_err <=ch0_fifo_err;
      b1_par <=ch0_fifo_par;
      b1_mty <=ch0_fifo_mod; 
    end
  else if(ch1_fifo_rden && ch1_fifo_rden_2d)
    begin
      b1_ena <=1'b1;
      b1_dat <=ch1_fifo_data; 
      b1_sop <=ch1_fifo_sop;  
      b1_eop <=ch1_fifo_eop;  
      b1_err <=ch1_fifo_err;  
      b1_par <=ch1_fifo_par;  
      b1_mty <=ch1_fifo_mod;  
    end
  else if(ch2_fifo_rden && ch2_fifo_rden_2d)
    begin
      b1_ena <=1'b1;
      b1_dat <=ch2_fifo_data;
      b1_sop <=ch2_fifo_sop;  
      b1_eop <=ch2_fifo_eop;  
      b1_err <=ch2_fifo_err;  
      b1_par <=ch2_fifo_par;  
      b1_mty <=ch2_fifo_mod;   
    end
  else if(ch3_fifo_rden && ch3_fifo_rden_2d)
    begin
      b1_ena <=1'b1;
      b1_dat <=ch3_fifo_data; 
      b1_sop <=ch3_fifo_sop;  
      b1_eop <=ch3_fifo_eop;  
      b1_err <=ch3_fifo_err;  
      b1_par <=ch3_fifo_par;  
      b1_mty <=ch3_fifo_mod;  
    end
  else
    begin
      b1_ena <=1'b0;
      b1_dat <=32'b0;
      b1_sop <=1'b0;
      b1_eop <=1'b0;
      b1_err <=1'b0;
      b1_par <=1'b0;
      b1_mty <=2'b0; 
    end
end

//****************************************************************************//
//for b2
//****************************************************************************//
//ch4_pkt_unfinished
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch4_pkt_unfinished <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      ch4_pkt_unfinished <=1'b0;
    end
  else if(ch4_fifo_sop && ch4_fifo_eop)
    begin
      ch4_pkt_unfinished <=1'b0;
    end
  else if(ch4_fifo_sop)
    begin
      ch4_pkt_unfinished <=1'b1;
    end
  else if(ch4_fifo_eop)
    begin
      ch4_pkt_unfinished <=1'b0;
    end
  else
    begin
      ch4_pkt_unfinished <=ch4_pkt_unfinished;
    end
end

//ch5_pkt_unfinished
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch5_pkt_unfinished <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      ch5_pkt_unfinished <=1'b0;
    end
  else if(ch5_fifo_sop && ch5_fifo_eop)
    begin
      ch5_pkt_unfinished <=1'b0;
    end
  else if(ch5_fifo_sop)
    begin
      ch5_pkt_unfinished <=1'b1;
    end  
  else if(ch5_fifo_eop)
    begin
      ch5_pkt_unfinished <=1'b0;
    end
  else
    begin
      ch5_pkt_unfinished <=ch5_pkt_unfinished;
    end
end

//ch6_pkt_unfinished
always @(posedge sys_clk_100m or negedge h_reset_n or negedge s_reset_n)
begin
  if(~h_reset_n)
    begin
      ch6_pkt_unfinished <=1'b0;    
    end
  else if(~s_reset_n)
    begin
      ch6_pkt_unfinished <=1'b0;
    end
  else if(ch6_fifo_sop && ch6_fifo_eop)
    begin
      ch6_pkt_unfinished <=1'b0;
    end  
  else if(ch6_fifo_sop)
    begin
      ch6_pkt_unfinished <=1'b1;
    end
  else if(ch6_fifo_eop)
    begin
      ch6_pkt_unfinished <=1'b0;
    end