dds.tan.rpt

来自「基于ＦＰＧＡ平台」· RPT 代码 · 共 206 行 · 第 1/5 页

; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg1 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg2 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg3 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg4 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg5 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg6 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg7 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg8 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a1~porta_address_reg9 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[8]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg0 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg1 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg2 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg3 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg4 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg5 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg6 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg7 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg8 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg9 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[3]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg0 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg1 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg2 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg3 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg4 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg5 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg6 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg7 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg8 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; Restricted to 163.03 MHz ( period = 6.134 ns )      ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|ram_block3a3~porta_address_reg9 ; Sin_rom:U6|altsyncram:altsyncram_component|altsyncram_ha91:auto_generated|altsyncram_66f2:altsyncram1|q_a[6]                          ; clk        ; clk      ; None                        ; None                      ; 3.641 ns                ;
; N/A                                     ; 316.56 MHz ( period = 3.159 ns )                    ; REG32B:U1|Dout[25]                                                                                                                    ; REG32B:U3|Dout[31]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.892 ns                ;
; N/A                                     ; 325.41 MHz ( period = 3.073 ns )                    ; REG32B:U1|Dout[25]                                                                                                                    ; REG32B:U3|Dout[30]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.806 ns                ;
; N/A                                     ; 326.80 MHz ( period = 3.060 ns )                    ; REG32B:U3|Dout[22]                                                                                                                    ; REG32B:U3|Dout[31]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.796 ns                ;
; N/A                                     ; 327.01 MHz ( period = 3.058 ns )                    ; REG32B:U1|Dout[21]                                                                                                                    ; REG32B:U3|Dout[31]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.794 ns                ;
; N/A                                     ; 334.78 MHz ( period = 2.987 ns )                    ; REG32B:U1|Dout[25]                                                                                                                    ; REG32B:U3|Dout[29]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.720 ns                ;
; N/A                                     ; 336.25 MHz ( period = 2.974 ns )                    ; REG32B:U3|Dout[22]                                                                                                                    ; REG32B:U3|Dout[30]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.710 ns                ;
; N/A                                     ; 336.47 MHz ( period = 2.972 ns )                    ; REG32B:U1|Dout[21]                                                                                                                    ; REG32B:U3|Dout[30]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.708 ns                ;
; N/A                                     ; 339.67 MHz ( period = 2.944 ns )                    ; REG32B:U1|Dout[27]                                                                                                                    ; REG32B:U3|Dout[31]                                                                                                                    ; clk        ; clk      ; None                        ; None                      ; 2.680 ns                ;
; N/A                                     ; Restricted to 340.02 MHz ( period = 2.941 ns )      ; REG32B:U1|Dout[20]