📄 data_rom.fit.qmsg
字号:
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "User Assigned Global Signals Promotion Operation " "Info: Completed User Assigned Global Signals Promotion Operation" { } { } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "clock Global clock in PIN M20 " "Info: Automatically promoted signal \"clock\" to use Global clock in PIN M20" { } { { "data_rom.vhd" "" { Text "D:/altera/quartus60/program/DDS/data_rom.vhd" 43 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "altera_internal_jtag~TCKUTAP Global clock " "Info: Automatically promoted signal \"altera_internal_jtag~TCKUTAP\" to use Global clock" { } { { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "altera_internal_jtag~TDO" } } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { altera_internal_jtag~TDO } "NODE_NAME" } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "sld_hub:sld_hub_inst\|CLR_SIGNAL Global clock " "Info: Automatically promoted signal \"sld_hub:sld_hub_inst\|CLR_SIGNAL\" to use Global clock" { } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 316 -1 0 } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] Global clock " "Info: Automatically promoted some destinations of signal \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\] " "Info: Destination \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[0\]\" may be non-global or may not use global clock" { } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 1150 -1 0 } } } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[1\] " "Info: Destination \"sld_hub:sld_hub_inst\|sld_jtag_state_machine:jtag_state_machine\|state\[1\]\" may be non-global or may not use global clock" { } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 1150 -1 0 } } } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 1150 -1 0 } } } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\] Global clock " "Info: Automatically promoted some destinations of signal \"sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[0\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "sld_hub:sld_hub_inst\|hub_tdo~566 " "Info: Destination \"sld_hub:sld_hub_inst\|hub_tdo~566\" may be non-global or may not use global clock" { } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 135 -1 0 } } } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "sld_hub:sld_hub_inst\|hub_tdo~567 " "Info: Destination \"sld_hub:sld_hub_inst\|hub_tdo~567\" may be non-global or may not use global clock" { } { { "../../libraries/megafunctions/sld_hub.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_hub.vhd" 135 -1 0 } } } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg " "Info: Destination \"altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|is_in_use_reg\" may be non-global or may not use global clock" { } { { "../../libraries/megafunctions/sld_mod_ram_rom.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_mod_ram_rom.vhd" 708 -1 0 } } } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0 " "Info: Destination \"altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0\" may be non-global or may not use global clock" { } { } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} } { { "../../libraries/megafunctions/sld_dffex.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_ALL_TO_GLOBAL" "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0 Global clock " "Info: Automatically promoted signal \"altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0\" to use Global clock" { } { { "d:/altera/quartus60/win/Assignment Editor.qase" "" { Assignment "d:/altera/quartus60/win/Assignment Editor.qase" 1 { { 0 "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~0" } } } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { altsyncram:altsyncram_component|altsyncram_9t41:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } } { "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" { Floorplan "d:/altera/quartus60/win/TimingClosureFloorplan.fld" "" "" { altsyncram:altsyncram_component|altsyncram_9t41:auto_generated|sld_mod_ram_rom:mgl_prim2|process4~0 } "NODE_NAME" } } } 0 0 "Automatically promoted signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL" "sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[3\] Global clock " "Info: Automatically promoted some destinations of signal \"sld_hub:sld_hub_inst\|sld_dffex:\\GEN_IRF:1:IRF\|Q\[3\]\" to use Global clock" { { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1 " "Info: Destination \"altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process1~1\" may be non-global or may not use global clock" { } { } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~11 " "Info: Destination \"altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process0~11\" may be non-global or may not use global clock" { } { } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} { "Info" "IFYGR_FYGR_AUTO_GLOBAL_ASSIGNED_SOME_TO_GLOBAL_SUB" "altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~13 " "Info: Destination \"altsyncram:altsyncram_component\|altsyncram_9t41:auto_generated\|sld_mod_ram_rom:mgl_prim2\|process4~13\" may be non-global or may not use global clock" { } { } 0 0 "Destination \"%1!s!\" may be non-global or may not use global clock" 0 0} } { { "../../libraries/megafunctions/sld_dffex.vhd" "" { Text "D:/altera/quartus60/libraries/megafunctions/sld_dffex.vhd" 19 -1 0 } } } 0 0 "Automatically promoted some destinations of signal \"%1!s!\" to use %2!s!" 0 0}
{ "Info" "IFYGR_FYGR_OPINFO_COMPLETED_OP" "Auto Global Promotion Operation " "Info: Completed Auto Global Promotion Operation" { } { } 0 0 "Completed %1!s!" 0 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_START_FYGR_REGPACKING_INFO" "" "Info: Starting register packing" { } { } 0 0 "Starting register packing" 0 0}
⌨️ 快捷键说明
复制代码
Ctrl + C
搜索代码
Ctrl + F
全屏模式
F11
切换主题
Ctrl + Shift + D
显示快捷键
?
增大字号
Ctrl + =
减小字号
Ctrl + -