adderful.map.summary

来自「DDS信号发生器」· SUMMARY 代码 · 共 11 行

Analysis & Synthesis Status : Successful - Thu May 17 19:53:46 2007
Quartus II Version : 6.0 Build 178 04/27/2006 SJ Full Version
Revision Name : adderful
Top-level Entity Name : adderful
Family : Cyclone
Total logic elements : 32
Total pins : 67
Total virtual pins : 0
Total memory bits : 0
Total PLLs : 0