smartsopc_board_cyclone_1c6.tan.rpt

sopc开发板标准NIOSII模块

; 1.871 ns                                ; 67.59 MHz ( period = 14.795 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.762 ns               ;
; 1.894 ns                                ; 67.70 MHz ( period = 14.772 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1          ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.739 ns               ;
; 1.923 ns                                ; 67.83 MHz ( period = 14.743 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.710 ns               ;
; 1.933 ns                                ; 67.87 MHz ( period = 14.733 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_slavearbiterlockenable             ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.700 ns               ;
; 1.937 ns                                ; 67.89 MHz ( period = 14.729 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.696 ns               ;
; 1.938 ns                                ; 67.90 MHz ( period = 14.728 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.695 ns               ;
; 1.945 ns                                ; 67.93 MHz ( period = 14.721 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.688 ns               ;
; 1.946 ns                                ; 67.93 MHz ( period = 14.720 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.687 ns               ;
; 1.947 ns                                ; 67.94 MHz ( period = 14.719 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[11]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.686 ns               ;
; 1.957 ns                                ; 67.99 MHz ( period = 14.709 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.676 ns               ;
; 1.960 ns                                ; 68.00 MHz ( period = 14.706 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.673 ns               ;
; 1.961 ns                                ; 68.00 MHz ( period = 14.705 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.672 ns               ;
; 1.968 ns                                ; 68.04 MHz ( period = 14.698 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.665 ns               ;
; 1.971 ns                                ; 68.05 MHz ( period = 14.695 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[18]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.488 ns                 ; 13.517 ns               ;
; 1.980 ns                                ; 68.09 MHz ( period = 14.686 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.653 ns               ;
; 1.989 ns                                ; 68.13 MHz ( period = 14.677 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_write                                                                                                                           ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.644 ns               ;
; 1.999 ns                                ; 68.18 MHz ( period = 14.667 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.634 ns               ;
; 2.003 ns                                ; 68.20 MHz ( period = 14.663 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_mem_byte_en[1]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.630 ns               ;
; 2.016 ns                                ; 68.26 MHz ( period = 14.650 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.617 ns               ;
; 2.027 ns                                ; 68.31 MHz ( period = 14.639 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|select_n_to_the_cfi_flash_0                                      ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.606 ns               ;
; 2.030 ns                                ; 68.32 MHz ( period = 14.636 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.603 ns               ;
; 2.031 ns                                ; 68.33 MHz ( period = 14.635 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.602 ns               ;
; 2.033 ns                                ; 68.34 MHz ( period = 14.633 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.600 ns               ;
; 2.038 ns                                ; 68.36 MHz ( period = 14.628 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.595 ns               ;
; 2.041 ns                                ; 68.38 MHz ( period = 14.625 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.592 ns               ;
; 2.047 ns                                ; 68.40 MHz ( period = 14.619 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.586 ns               ;
; 2.048 ns                                ; 68.41 MHz ( period = 14.618 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.585 ns               ;
; 2.050 ns                                ; 68.42 MHz ( period = 14.616 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.583 ns               ;
; 2.055 ns                                ; 68.44 MHz ( period = 14.611 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.578 ns               ;
; 2.055 ns                                ; 68.44 MHz ( period = 14.611 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.578 ns               ;
; 2.056 ns                                ; 68.45 MHz ( period = 14.610 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.577 ns               ;
; 2.063 ns                                ; 68.48 MHz ( period = 14.603 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.570 ns               ;
; 2.064 ns