smartsopc_board_cyclone_1c6.tan.rpt

sopc开发板标准NIOSII模块

; 1.195 ns                                ; 64.64 MHz ( period = 15.471 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.438 ns               ;
; 1.281 ns                                ; 65.00 MHz ( period = 15.385 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.352 ns               ;
; 1.315 ns                                ; 65.14 MHz ( period = 15.351 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[16]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.488 ns                 ; 14.173 ns               ;
; 1.333 ns                                ; 65.22 MHz ( period = 15.333 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[17]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.488 ns                 ; 14.155 ns               ;
; 1.445 ns                                ; 65.70 MHz ( period = 15.221 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|select_n_to_the_cfi_flash_1                                      ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.188 ns               ;
; 1.451 ns                                ; 65.72 MHz ( period = 15.215 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[9]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.182 ns               ;
; 1.462 ns                                ; 65.77 MHz ( period = 15.204 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.171 ns               ;
; 1.465 ns                                ; 65.79 MHz ( period = 15.201 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[12]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.168 ns               ;
; 1.466 ns                                ; 65.79 MHz ( period = 15.200 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[20]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.167 ns               ;
; 1.473 ns                                ; 65.82 MHz ( period = 15.193 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[10]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.160 ns               ;
; 1.485 ns                                ; 65.87 MHz ( period = 15.181 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[8]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.148 ns               ;
; 1.485 ns                                ; 65.87 MHz ( period = 15.181 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.148 ns               ;
; 1.555 ns                                ; 66.18 MHz ( period = 15.111 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.078 ns               ;
; 1.572 ns                                ; 66.25 MHz ( period = 15.094 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.061 ns               ;
; 1.580 ns                                ; 66.29 MHz ( period = 15.086 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.053 ns               ;
; 1.594 ns                                ; 66.35 MHz ( period = 15.072 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.039 ns               ;
; 1.603 ns                                ; 66.39 MHz ( period = 15.063 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1          ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.030 ns               ;
; 1.605 ns                                ; 66.40 MHz ( period = 15.061 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[16]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.488 ns                 ; 13.883 ns               ;
; 1.617 ns                                ; 66.45 MHz ( period = 15.049 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 14.016 ns               ;
; 1.623 ns                                ; 66.48 MHz ( period = 15.043 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[17]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.488 ns                 ; 13.865 ns               ;
; 1.681 ns                                ; 66.73 MHz ( period = 14.985 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|i_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[18]                                   ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.488 ns                 ; 13.807 ns               ;
; 1.687 ns                                ; 66.76 MHz ( period = 14.979 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.946 ns               ;
; 1.698 ns                                ; 66.81 MHz ( period = 14.968 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_write                                                                                                                           ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.935 ns               ;
; 1.704 ns                                ; 66.84 MHz ( period = 14.962 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.929 ns               ;
; 1.712 ns                                ; 66.87 MHz ( period = 14.954 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[1]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.921 ns               ;
; 1.735 ns                                ; 66.97 MHz ( period = 14.931 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|last_cycle_cpu_0_data_master_granted_slave_cfi_flash_0_s1          ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.898 ns               ;
; 1.737 ns                                ; 66.98 MHz ( period = 14.929 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[21]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|select_n_to_the_cfi_flash_1                                      ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.896 ns               ;
; 1.753 ns                                ; 67.06 MHz ( period = 14.913 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_read                                                                                                                            ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.880 ns               ;
; 1.776 ns                                ; 67.16 MHz ( period = 14.890 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_data_master_arbitrator:the_cpu_0_data_master|cpu_0_data_master_dbs_address[1]                                                               ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.857 ns               ;
; 1.801 ns                                ; 67.27 MHz ( period = 14.865 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_avalon_slave_slavearbiterlockenable             ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.832 ns               ;
; 1.830 ns                                ; 67.40 MHz ( period = 14.836 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|d_write                                                                                                                           ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[5]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.803 ns               ;
; 1.846 ns                                ; 67.48 MHz ( period = 14.820 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.787 ns               ;
; 1.857 ns                                ; 67.53 MHz ( period = 14.809 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_shift_rot_result[6]                                                                                                             ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_alu_result[22]                                                                                                                ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 16.346 ns                 ; 14.489 ns               ;
; 1.863 ns                                ; 67.55 MHz ( period = 14.803 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|ic_fill_tag[12]                                                                                                                   ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[6]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.770 ns               ;
; 1.867 ns                                ; 67.57 MHz ( period = 14.799 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0_instruction_master_arbitrator:the_cpu_0_instruction_master|cpu_0_instruction_master_latency_counter[0]                                      ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.766 ns               ;
; 1.871 ns                                ; 67.59 MHz ( period = 14.795 ns )                    ; SmartSOPC_Board_Cyclone_1C6:inst|cpu_0:the_cpu_0|M_mem_byte_en[1]                                                                                                                  ; SmartSOPC_Board_Cyclone_1C6:inst|tri_state_bridge_0_avalon_slave_arbitrator:the_tri_state_bridge_0_avalon_slave|tri_state_bridge_0_address[7]                                    ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; SYS_CLK:inst1|altpll:altpll_component|_clk0 ; 16.666 ns                   ; 15.633 ns                 ; 13.762 ns               ;