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📄 fir_da.v

📁 完成一个FIR数字滤波器的设计。要求: 1、 基于直接型和分布式两种算法。 2、 输入数据宽度为8位
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            lookup3     <= 0;
            lookup4_1_1 <= 0;
            lookup4_1_2 <= 0;
            lookup4_1_3 <= 0;
            lookup4_1_4 <= 0;
            lookup4_2_1 <= 0;
            lookup4_2_2 <= 0;
            lookup4     <= 0;
            lookup5_1_1 <= 0;
            lookup5_1_2 <= 0;
            lookup5_1_3 <= 0;
            lookup5_1_4 <= 0;
            lookup5_2_1 <= 0;
            lookup5_2_2 <= 0;
            lookup5     <= 0;
            lookup6_1_1 <= 0;
            lookup6_1_2 <= 0;
            lookup6_1_3 <= 0;
            lookup6_1_4 <= 0;
            lookup6_2_1 <= 0;
            lookup6_2_2 <= 0;
            lookup6     <= 0;
            lookup7_1_1 <= 0;
            lookup7_1_2 <= 0;
            lookup7_1_3 <= 0;
            lookup7_1_4 <= 0;
            lookup7_2_1 <= 0;
            lookup7_2_2 <= 0;
            lookup7     <= 0;
          end
      else
          begin
          	//0
          	lookup0_1_1 <= lookuplow({din_reg_02_8b[0],din_reg_01_8b[0],din_reg_00_8b[0],din[0]});
          	lookup0_1_2 <= lookuphigh({din_reg_06_8b[0],din_reg_05_8b[0],din_reg_04_8b[0],din_reg_03_8b[0]});
          	lookup0_1_3 <= lookuphigh({din_reg_07_8b[0],din_reg_08_8b[0],din_reg_09_8b[0],din_reg_10_8b[0]});
          	lookup0_1_4 <= lookuplow({din_reg_11_8b[0],din_reg_12_8b[0],din_reg_13_8b[0],din_reg_14_8b[0]});
          	lookup0_2_1 <= lookup0_1_1 + lookup0_1_2;
          	lookup0_2_2 <= lookup0_1_3 + lookup0_1_4;
          	lookup0     <= lookup0_2_1 + lookup0_2_2;
          	//1
          	lookup1_1_1 <= lookuplow({din_reg_02_8b[1],din_reg_01_8b[1],din_reg_00_8b[1],din[1]});
          	lookup1_1_2 <= lookuphigh({din_reg_06_8b[1],din_reg_05_8b[1],din_reg_04_8b[1],din_reg_03_8b[1]});
          	lookup1_1_3 <= lookuphigh({din_reg_07_8b[1],din_reg_08_8b[1],din_reg_09_8b[1],din_reg_10_8b[1]});
          	lookup1_1_4 <= lookuplow({din_reg_11_8b[1],din_reg_12_8b[1],din_reg_13_8b[1],din_reg_14_8b[1]});
          	lookup1_2_1 <= lookup1_1_1 + lookup1_1_2;
          	lookup1_2_2 <= lookup1_1_3 + lookup1_1_4;
          	lookup1     <= lookup1_2_1 + lookup1_2_2;
          	//2
          	lookup2_1_1 <= lookuplow({din_reg_02_8b[2],din_reg_01_8b[2],din_reg_00_8b[2],din[2]});
          	lookup2_1_2 <= lookuphigh({din_reg_06_8b[2],din_reg_05_8b[2],din_reg_04_8b[2],din_reg_03_8b[2]});
          	lookup2_1_3 <= lookuphigh({din_reg_07_8b[2],din_reg_08_8b[2],din_reg_09_8b[2],din_reg_10_8b[2]});
          	lookup2_1_4 <= lookuplow({din_reg_11_8b[2],din_reg_12_8b[2],din_reg_13_8b[2],din_reg_14_8b[2]});
          	lookup2_2_1 <= lookup2_1_1 + lookup2_1_2;
          	lookup2_2_2 <= lookup2_1_3 + lookup2_1_4;
          	lookup2     <= lookup2_2_1 + lookup2_2_2;
          	//3
          	lookup3_1_1 <= lookuplow({din_reg_02_8b[3],din_reg_01_8b[3],din_reg_00_8b[3],din[3]});
          	lookup3_1_2 <= lookuphigh({din_reg_06_8b[3],din_reg_05_8b[3],din_reg_04_8b[3],din_reg_03_8b[3]});
          	lookup3_1_3 <= lookuphigh({din_reg_07_8b[3],din_reg_08_8b[3],din_reg_09_8b[3],din_reg_10_8b[3]});
          	lookup3_1_4 <= lookuplow({din_reg_11_8b[3],din_reg_12_8b[3],din_reg_13_8b[3],din_reg_14_8b[3]});
          	lookup3_2_1 <= lookup3_1_1 + lookup3_1_2;
          	lookup3_2_2 <= lookup3_1_3 + lookup3_1_4;
          	lookup3     <= lookup3_2_1 + lookup3_2_2;
          	//4
          	lookup4_1_1 <= lookuplow({din_reg_02_8b[4],din_reg_01_8b[4],din_reg_00_8b[4],din[4]});
          	lookup4_1_2 <= lookuphigh({din_reg_06_8b[4],din_reg_05_8b[4],din_reg_04_8b[4],din_reg_03_8b[4]});
          	lookup4_1_3 <= lookuphigh({din_reg_07_8b[4],din_reg_08_8b[4],din_reg_09_8b[4],din_reg_10_8b[4]});
          	lookup4_1_4 <= lookuplow({din_reg_11_8b[4],din_reg_12_8b[4],din_reg_13_8b[4],din_reg_14_8b[4]});
          	lookup4_2_1 <= lookup4_1_1 + lookup4_1_2;
          	lookup4_2_2 <= lookup4_1_3 + lookup4_1_4;
          	lookup4     <= lookup4_2_1 + lookup4_2_2;
          	//5
          	lookup5_1_1 <= lookuplow({din_reg_02_8b[5],din_reg_01_8b[5],din_reg_00_8b[5],din[5]});
          	lookup5_1_2 <= lookuphigh({din_reg_06_8b[5],din_reg_05_8b[5],din_reg_04_8b[5],din_reg_03_8b[5]});
          	lookup5_1_3 <= lookuphigh({din_reg_07_8b[5],din_reg_08_8b[5],din_reg_09_8b[5],din_reg_10_8b[5]});
          	lookup5_1_4 <= lookuplow({din_reg_11_8b[5],din_reg_12_8b[5],din_reg_13_8b[5],din_reg_14_8b[5]});
          	lookup5_2_1 <= lookup5_1_1 + lookup5_1_2;
          	lookup5_2_2 <= lookup5_1_3 + lookup5_1_4;
          	lookup5     <= lookup5_2_1 + lookup5_2_2;
          	//6
          	lookup6_1_1 <= lookuplow({din_reg_02_8b[6],din_reg_01_8b[6],din_reg_00_8b[6],din[6]});
          	lookup6_1_2 <= lookuphigh({din_reg_06_8b[6],din_reg_05_8b[6],din_reg_04_8b[6],din_reg_03_8b[6]});
          	lookup6_1_3 <= lookuphigh({din_reg_07_8b[6],din_reg_08_8b[6],din_reg_09_8b[6],din_reg_10_8b[6]});
          	lookup6_1_4 <= lookuplow({din_reg_11_8b[6],din_reg_12_8b[6],din_reg_13_8b[6],din_reg_14_8b[6]});
          	lookup6_2_1 <= lookup6_1_1 + lookup6_1_2;
          	lookup6_2_2 <= lookup6_1_3 + lookup6_1_4;
          	lookup6     <= lookup6_2_1 + lookup6_2_2;
          	//7
          	lookup7_1_1 <= lookuplow({din_reg_02_8b[7],din_reg_01_8b[7],din_reg_00_8b[7],din[7]});
          	lookup7_1_2 <= lookuphigh({din_reg_06_8b[7],din_reg_05_8b[7],din_reg_04_8b[7],din_reg_03_8b[7]});
          	lookup7_1_3 <= lookuphigh({din_reg_07_8b[7],din_reg_08_8b[7],din_reg_09_8b[7],din_reg_10_8b[7]});
          	lookup7_1_4 <= lookuplow({din_reg_11_8b[7],din_reg_12_8b[7],din_reg_13_8b[7],din_reg_14_8b[7]});
          	lookup7_2_1 <= lookup7_1_1 + lookup7_1_2;
          	lookup7_2_2 <= lookup7_1_3 + lookup7_1_4;
          	lookup7     <= lookup7_2_1 + lookup7_2_2;
          end
/*          
  wire [17:0] lookup0;
  wire [17:0] lookup1;
  wire [17:0] lookup2;
  wire [17:0] lookup3;
  wire [17:0] lookup4;
  wire [17:0] lookup5;
  wire [17:0] lookup6;
  wire [17:0] lookup7;

	assign lookup0= lookuplow({din_reg_02_8b[0],din_reg_01_8b[0],din_reg_00_8b[0],din[0]})+
	                lookuphigh({din_reg_06_8b[0],din_reg_05_8b[0],din_reg_04_8b[0],din_reg_03_8b[0]})+
	                lookuphigh({din_reg_07_8b[0],din_reg_08_8b[0],din_reg_09_8b[0],din_reg_10_8b[0]})+
	                lookuplow({din_reg_11_8b[0],din_reg_12_8b[0],din_reg_13_8b[0],din_reg_14_8b[0]});
	                
	assign lookup1= lookuplow({din_reg_02_8b[1],din_reg_01_8b[1],din_reg_00_8b[1],din[1]})+
	                lookuphigh({din_reg_06_8b[1],din_reg_05_8b[1],din_reg_04_8b[1],din_reg_03_8b[1]})+
	                lookuphigh({din_reg_07_8b[1],din_reg_08_8b[1],din_reg_09_8b[1],din_reg_10_8b[1]})+
	                lookuplow({din_reg_11_8b[1],din_reg_12_8b[1],din_reg_13_8b[1],din_reg_14_8b[1]});
	                
	assign lookup2= lookuplow({din_reg_02_8b[2],din_reg_01_8b[2],din_reg_00_8b[2],din[2]})+
	                lookuphigh({din_reg_06_8b[2],din_reg_05_8b[2],din_reg_04_8b[2],din_reg_03_8b[2]})+
	                lookuphigh({din_reg_07_8b[2],din_reg_08_8b[2],din_reg_09_8b[2],din_reg_10_8b[2]})+
	                lookuplow({din_reg_11_8b[2],din_reg_12_8b[2],din_reg_13_8b[2],din_reg_14_8b[2]}); 
	                      
	assign lookup3= lookuplow({din_reg_02_8b[3],din_reg_01_8b[3],din_reg_00_8b[3],din[3]})+
	                lookuphigh({din_reg_06_8b[3],din_reg_05_8b[3],din_reg_04_8b[3],din_reg_03_8b[3]})+
	                lookuphigh({din_reg_07_8b[3],din_reg_08_8b[3],din_reg_09_8b[3],din_reg_10_8b[3]})+
	                lookuplow({din_reg_11_8b[3],din_reg_12_8b[3],din_reg_13_8b[3],din_reg_14_8b[3]}); 

	assign lookup4= lookuplow({din_reg_02_8b[4],din_reg_01_8b[4],din_reg_00_8b[4],din[4]})+
	                lookuphigh({din_reg_06_8b[4],din_reg_05_8b[4],din_reg_04_8b[4],din_reg_03_8b[4]})+
	                lookuphigh({din_reg_07_8b[4],din_reg_08_8b[4],din_reg_09_8b[4],din_reg_10_8b[4]})+
	                lookuplow({din_reg_11_8b[4],din_reg_12_8b[4],din_reg_13_8b[4],din_reg_14_8b[4]});  

	assign lookup5= lookuplow({din_reg_02_8b[5],din_reg_01_8b[5],din_reg_00_8b[5],din[5]})+
	                lookuphigh({din_reg_06_8b[5],din_reg_05_8b[5],din_reg_04_8b[5],din_reg_03_8b[5]})+
	                lookuphigh({din_reg_07_8b[5],din_reg_08_8b[5],din_reg_09_8b[5],din_reg_10_8b[5]})+
	                lookuplow({din_reg_11_8b[5],din_reg_12_8b[5],din_reg_13_8b[5],din_reg_14_8b[5]});  

	assign lookup6= lookuplow({din_reg_02_8b[6],din_reg_01_8b[6],din_reg_00_8b[6],din[6]})+
	                lookuphigh({din_reg_06_8b[6],din_reg_05_8b[6],din_reg_04_8b[6],din_reg_03_8b[6]})+
	                lookuphigh({din_reg_07_8b[6],din_reg_08_8b[6],din_reg_09_8b[6],din_reg_10_8b[6]})+
	                lookuplow({din_reg_11_8b[6],din_reg_12_8b[6],din_reg_13_8b[6],din_reg_14_8b[6]});  	                

	assign lookup7= lookuplow({din_reg_02_8b[7],din_reg_01_8b[7],din_reg_00_8b[7],din[7]})+
	                lookuphigh({din_reg_06_8b[7],din_reg_05_8b[7],din_reg_04_8b[7],din_reg_03_8b[7]})+
	                lookuphigh({din_reg_07_8b[7],din_reg_08_8b[7],din_reg_09_8b[7],din_reg_10_8b[7]})+
	                lookuplow({din_reg_11_8b[7],din_reg_12_8b[7],din_reg_13_8b[7],din_reg_14_8b[7]});  */               
//------------------------------------------------      
//  流水线加法
//------------------------------------------------ 
  reg [25:0] temp_1_1,temp_1_2,temp_1_3,temp_1_4;
  reg [25:0] temp_2_1,temp_2_2;
  reg [25:0] temp_3;  
         	
  always @(posedge clock or posedge reset)
      if (reset)
          begin
          	  temp_1_1 <= 0;
          	  temp_1_2 <= 0;
          	  temp_1_3 <= 0;
          	  temp_1_4 <= 0;
          	  temp_2_1 <= 0;
          	  temp_2_2 <= 0;
          	  temp_3   <= 0;
          end          	  
      else
          begin
          	  temp_1_1 <= {{7{lookup0[18]}},lookup0} + {{6{lookup1[18]}},lookup1,1'b0};
          	  temp_1_2 <= {{5{lookup2[18]}},lookup2,2'b0} + {{4{lookup3[18]}},lookup3,3'b0};
          	  temp_1_3 <= {{3{lookup4[18]}},lookup4,4'b0} + {{2{lookup5[18]}},lookup5,5'b0};
          	  temp_1_4 <= {lookup6[18],lookup6,6'b0}- {lookup7,7'b0}; 
          	  temp_2_1 <= temp_1_1 + temp_1_2;
          	  temp_2_2 <= temp_1_3 + temp_1_4;
          	  
          	  temp_3   <= temp_2_1 + temp_2_2 ;
          end 
          
assign	dout = temp_3[25:10]; 

endmodule

          	

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