arraycheck.fit.qmsg

在QuartusII运用ＡＨＤＬ语言

{ "Info" "IFSAC_FSAC_FINISH_LUT_IO_RAM_PACKING" "" "Info: Finished moving registers into I/O cells, LUTs, and RAM blocks" {  } {  } 0}
{ "Info" "IFSAC_FSAC_REGISTER_PACKING_FINISH_REGPACKING_INFO" "" "Info: Finished register packing" {  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement " "Info: Statistics of I/O pins that need to be placed that use the same VCCIO and VREF, before I/O pin placement" { { "Info" "IFSAC_FSAC_SINGLE_IOC_GROUP_STATISTICS" "26 unused 3.30 0 26 0 " "Info: Number of I/O pins in group: 26 (unused VREF, 3.30 VCCIO, 0 input, 26 output, 0 bidirectional)" { { "Info" "IFSAC_FSAC_IO_STDS_IN_IOC_GROUP" "LVTTL. " "Info: I/O standards used: LVTTL." {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFSAC_FSAC_IO_STATS_BEFORE_AFTER_PLACEMENT" "before " "Info: I/O bank details before I/O pin placement" { { "Info" "IFSAC_FSAC_IO_BANK_PIN_GROUP_STATISTICS" "I/O banks " "Info: Statistics of I/O banks" { { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "1 does not use unused 4 18 " "Info: I/O bank number 1 does not use VREF pins and has unused VCCIO pins. 4 total pin(s) used --  18 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "2 does not use unused 0 28 " "Info: I/O bank number 2 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  28 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "3 does not use unused 0 26 " "Info: I/O bank number 3 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  26 pins available" {  } {  } 0} { "Info" "IFSAC_FSAC_SINGLE_IO_BANK_STATISTICS" "4 does not use unused 0 28 " "Info: I/O bank number 4 does not use VREF pins and has unused VCCIO pins. 0 total pin(s) used --  28 pins available" {  } {  } 0}  } {  } 0}  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_START" "" "Info: Fitter placement preparation operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_PREP_END" "00:00:00 " "Info: Fitter placement preparation operations ending: elapsed time is 00:00:00" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_START" "" "Info: Fitter placement operations beginning" {  } {  } 0}
{ "Info" "IFITAPI_FITAPI_INFO_VPR_PLACEMENT_FINISH" "" "Info: Fitter placement was successful" {  } {  } 0}
{ "Info" "ITDB_FULL_ESTIMATED_DATA_PATH_RESULT" "3.567 ns register register " "Info: Estimated most critical path is register to register delay of 3.567 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Poly\[0\]~reg 1 REG LAB_X21_Y10 14 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LAB_X21_Y10; Fanout = 14; REG Node = 'Poly\[0\]~reg'" {  } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "" { Poly[0]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.787 ns) + CELL(0.590 ns) 1.377 ns Exactarray\[0\]~461 2 COMB LAB_X23_Y10 2 " "Info: 2: + IC(0.787 ns) + CELL(0.590 ns) = 1.377 ns; Loc. = LAB_X23_Y10; Fanout = 2; COMB Node = 'Exactarray\[0\]~461'" {  } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.377 ns" { Poly[0]~reg Exactarray[0]~461 } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 28 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.075 ns) + CELL(0.590 ns) 2.042 ns Exactarray\[0\]~462 3 COMB LAB_X23_Y10 3 " "Info: 3: + IC(0.075 ns) + CELL(0.590 ns) = 2.042 ns; Loc. = LAB_X23_Y10; Fanout = 3; COMB Node = 'Exactarray\[0\]~462'" {  } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "0.665 ns" { Exactarray[0]~461 Exactarray[0]~462 } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 28 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.373 ns) + CELL(0.292 ns) 2.707 ns Exactarray\[2\]~465 4 COMB LAB_X23_Y10 2 " "Info: 4: + IC(0.373 ns) + CELL(0.292 ns) = 2.707 ns; Loc. = LAB_X23_Y10; Fanout = 2; COMB Node = 'Exactarray\[2\]~465'" {  } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "0.665 ns" { Exactarray[0]~462 Exactarray[2]~465 } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 28 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.551 ns) + CELL(0.309 ns) 3.567 ns Exactarray\[2\]~reg 5 REG LAB_X23_Y10 3 " "Info: 5: + IC(0.551 ns) + CELL(0.309 ns) = 3.567 ns; Loc. = LAB_X23_Y10; Fanout = 3; REG Node = 'Exactarray\[2\]~reg'" {  } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "0.860 ns" { Exactarray[2]~465 Exactarray[2]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 9 12 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.781 ns 49.93 % " "Info: Total cell delay = 1.781 ns ( 49.93 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.786 ns 50.07 % " "Info: Total interconnect delay = 1.786 ns ( 50.07 % )" {  } {  } 0}  } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "3.567 ns" { Poly[0]~reg Exactarray[0]~461 Exactarray[0]~462 Exactarray[2]~465 Exactarray[2]~reg } "NODE_NAME" } "" } }  } 0}
{ "Info" "IFITAPI_FITAPI_VPR_FITTER_PLACEMENT_END" "00:00:00 " "Info: Fitter placement operations ending: elapsed time is 00:00:00" {  } {  } 0}