📄 arraycheck.tan.qmsg
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{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "Clock register Poly\[0\]~reg register Exactarray\[2\]~reg 231.32 MHz 4.323 ns Internal " "Info: Clock \"Clock\" has Internal fmax of 231.32 MHz between source register \"Poly\[0\]~reg\" and destination register \"Exactarray\[2\]~reg\" (period= 4.323 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.062 ns + Longest register register " "Info: + Longest register to register delay is 4.062 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Poly\[0\]~reg 1 REG LC_X21_Y10_N3 14 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X21_Y10_N3; Fanout = 14; REG Node = 'Poly\[0\]~reg'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "" { Poly[0]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.250 ns) + CELL(0.114 ns) 1.364 ns Exactarray\[0\]~461 2 COMB LC_X23_Y10_N6 2 " "Info: 2: + IC(1.250 ns) + CELL(0.114 ns) = 1.364 ns; Loc. = LC_X23_Y10_N6; Fanout = 2; COMB Node = 'Exactarray\[0\]~461'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.364 ns" { Poly[0]~reg Exactarray[0]~461 } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 28 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.466 ns) + CELL(0.590 ns) 2.420 ns Exactarray\[0\]~462 3 COMB LC_X23_Y10_N3 3 " "Info: 3: + IC(0.466 ns) + CELL(0.590 ns) = 2.420 ns; Loc. = LC_X23_Y10_N3; Fanout = 3; COMB Node = 'Exactarray\[0\]~462'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.056 ns" { Exactarray[0]~461 Exactarray[0]~462 } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 28 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.477 ns) + CELL(0.114 ns) 3.011 ns Exactarray\[2\]~465 4 COMB LC_X23_Y10_N5 2 " "Info: 4: + IC(0.477 ns) + CELL(0.114 ns) = 3.011 ns; Loc. = LC_X23_Y10_N5; Fanout = 2; COMB Node = 'Exactarray\[2\]~465'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "0.591 ns" { Exactarray[0]~462 Exactarray[2]~465 } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 28 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.444 ns) + CELL(0.607 ns) 4.062 ns Exactarray\[2\]~reg 5 REG LC_X23_Y10_N8 3 " "Info: 5: + IC(0.444 ns) + CELL(0.607 ns) = 4.062 ns; Loc. = LC_X23_Y10_N8; Fanout = 3; REG Node = 'Exactarray\[2\]~reg'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.051 ns" { Exactarray[2]~465 Exactarray[2]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 9 12 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.425 ns 35.08 % " "Info: Total cell delay = 1.425 ns ( 35.08 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.637 ns 64.92 % " "Info: Total interconnect delay = 2.637 ns ( 64.92 % )" { } { } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "4.062 ns" { Poly[0]~reg Exactarray[0]~461 Exactarray[0]~462 Exactarray[2]~465 Exactarray[2]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.062 ns" { Poly[0]~reg Exactarray[0]~461 Exactarray[0]~462 Exactarray[2]~465 Exactarray[2]~reg } { 0.000ns 1.250ns 0.466ns 0.477ns 0.444ns } { 0.000ns 0.114ns 0.590ns 0.114ns 0.607ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock destination 2.781 ns + Shortest register " "Info: + Shortest clock path from clock \"Clock\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_17 34 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 34; CLK Node = 'Clock'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "" { Clock } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 3 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns Exactarray\[2\]~reg 2 REG LC_X23_Y10_N8 3 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X23_Y10_N8; Fanout = 3; REG Node = 'Exactarray\[2\]~reg'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.312 ns" { Clock Exactarray[2]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 9 12 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" { } { } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Exactarray[2]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Exactarray[2]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock source 2.781 ns - Longest register " "Info: - Longest clock path from clock \"Clock\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_17 34 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 34; CLK Node = 'Clock'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "" { Clock } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 3 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns Poly\[0\]~reg 2 REG LC_X21_Y10_N3 14 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X21_Y10_N3; Fanout = 14; REG Node = 'Poly\[0\]~reg'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.312 ns" { Clock Poly[0]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" { } { } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Poly[0]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Poly[0]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Exactarray[2]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Exactarray[2]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Poly[0]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Poly[0]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" { } { { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } } } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" { } { { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 9 12 0 } } } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "4.062 ns" { Poly[0]~reg Exactarray[0]~461 Exactarray[0]~462 Exactarray[2]~465 Exactarray[2]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.062 ns" { Poly[0]~reg Exactarray[0]~461 Exactarray[0]~462 Exactarray[2]~465 Exactarray[2]~reg } { 0.000ns 1.250ns 0.466ns 0.477ns 0.444ns } { 0.000ns 0.114ns 0.590ns 0.114ns 0.607ns } } } { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Exactarray[2]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Exactarray[2]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Poly[0]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Poly[0]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "Clock Poly\[7\] Poly\[7\]~reg 7.285 ns register " "Info: tco from clock \"Clock\" to destination pin \"Poly\[7\]\" through register \"Poly\[7\]~reg\" is 7.285 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "Clock source 2.781 ns + Longest register " "Info: + Longest clock path from clock \"Clock\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns Clock 1 CLK PIN_17 34 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_17; Fanout = 34; CLK Node = 'Clock'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "" { Clock } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 3 2 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns Poly\[7\]~reg 2 REG LC_X21_Y10_N5 3 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X21_Y10_N5; Fanout = 3; REG Node = 'Poly\[7\]~reg'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "1.312 ns" { Clock Poly[7]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" { } { } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Poly[7]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Poly[7]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" { } { { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } } } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.280 ns + Longest register pin " "Info: + Longest register to pin delay is 4.280 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns Poly\[7\]~reg 1 REG LC_X21_Y10_N5 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X21_Y10_N5; Fanout = 3; REG Node = 'Poly\[7\]~reg'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "" { Poly[7]~reg } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 7 6 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.156 ns) + CELL(2.124 ns) 4.280 ns Poly\[7\] 2 PIN PIN_104 0 " "Info: 2: + IC(2.156 ns) + CELL(2.124 ns) = 4.280 ns; Loc. = PIN_104; Fanout = 0; PIN Node = 'Poly\[7\]'" { } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "4.280 ns" { Poly[7]~reg Poly[7] } "NODE_NAME" } "" } } { "arraycheck.tdf" "" { Text "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/arraycheck.tdf" 4 2 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.124 ns 49.63 % " "Info: Total cell delay = 2.124 ns ( 49.63 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.156 ns 50.37 % " "Info: Total interconnect delay = 2.156 ns ( 50.37 % )" { } { } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "4.280 ns" { Poly[7]~reg Poly[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.280 ns" { Poly[7]~reg Poly[7] } { 0.000ns 2.156ns } { 0.000ns 2.124ns } } } } 0} } { { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "2.781 ns" { Clock Poly[7]~reg } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { Clock Clock~out0 Poly[7]~reg } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" "" { Report "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck_cmp.qrpt" Compiler "arraycheck" "UNKNOWN" "V1" "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/db/arraycheck.quartus_db" { Floorplan "D:/PLD作业/研二队-戴振华(S20051003)第4次作业/text7.3PN-arraycheck/" "" "4.280 ns" { Poly[7]~reg Poly[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.280 ns" { Poly[7]~reg Poly[7] } { 0.000ns 2.156ns } { 0.000ns 2.124ns } } } } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1 Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Wed Jan 11 13:57:37 2006 " "Info: Processing ended: Wed Jan 11 13:57:37 2006" { } { } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" { } { } 0} } { } 0}
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