📄 arraycheck.map.eqn
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-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions
-- and other software and tools, and its AMPP partner logic
-- functions, and any output files any of the foregoing
-- (including device programming or simulation files), and any
-- associated documentation or information are expressly subject
-- to the terms and conditions of the Altera Program License
-- Subscription Agreement, Altera MegaCore Function License
-- Agreement, or other applicable license agreement, including,
-- without limitation, that your use is for the sole purpose of
-- programming logic devices manufactured by Altera and sold by
-- Altera or its authorized distributors. Please refer to the
-- applicable agreement for further details.
--A1L46Q is Poly[0]~reg
--operation mode is normal
A1L46Q_lut_out = !A1L66Q & (!A1L3 # !A1L1);
A1L46Q = DFFEAS(A1L46Q_lut_out, Clock, Init, , , , , , );
--A1L66Q is Poly[1]~reg
--operation mode is normal
A1L66Q_lut_out = A1L86Q;
A1L66Q = DFFEAS(A1L66Q_lut_out, Clock, Init, , , , , , );
--A1L86Q is Poly[2]~reg
--operation mode is normal
A1L86Q_lut_out = A1L07Q;
A1L86Q = DFFEAS(A1L86Q_lut_out, Clock, Init, , , , , , );
--A1L07Q is Poly[3]~reg
--operation mode is normal
A1L07Q_lut_out = A1L27Q;
A1L07Q = DFFEAS(A1L07Q_lut_out, Clock, Init, , , , , , );
--A1L27Q is Poly[4]~reg
--operation mode is normal
A1L27Q_lut_out = A1L47Q;
A1L27Q = DFFEAS(A1L27Q_lut_out, Clock, Init, , , , , , );
--A1L47Q is Poly[5]~reg
--operation mode is normal
A1L47Q_lut_out = A1L67Q;
A1L47Q = DFFEAS(A1L47Q_lut_out, Clock, Init, , , , , , );
--A1L67Q is Poly[6]~reg
--operation mode is normal
A1L67Q_lut_out = A1L87Q;
A1L67Q = DFFEAS(A1L67Q_lut_out, Clock, Init, , , , , , );
--A1L87Q is Poly[7]~reg
--operation mode is normal
A1L87Q_lut_out = A1L08Q;
A1L87Q = DFFEAS(A1L87Q_lut_out, Clock, Init, , , , , , );
--A1L08Q is Poly[8]~reg
--operation mode is normal
A1L08Q_lut_out = A1L28Q;
A1L08Q = DFFEAS(A1L08Q_lut_out, Clock, Init, , , , , , );
--A1L28Q is Poly[9]~reg
--operation mode is normal
A1L28Q_lut_out = A1L48Q;
A1L28Q = DFFEAS(A1L28Q_lut_out, Clock, Init, , , , , , );
--A1L48Q is Poly[10]~reg
--operation mode is normal
A1L48Q_lut_out = A1L1 & !A1L3 & (A1L46Q $ !A1L86Q) # !A1L1 & (A1L46Q $ !A1L86Q);
A1L48Q = DFFEAS(A1L48Q_lut_out, Clock, Init, , , , , , );
--A1L81Q is Count[0]~reg
--operation mode is arithmetic
A1L81Q_lut_out = !A1L81Q;
A1L81Q = DFFEAS(A1L81Q_lut_out, Clock, Init, , , , , , );
--A1L71 is Count[0]~78
--operation mode is arithmetic
A1L71 = CARRY(A1L81Q);
--A1L12Q is Count[1]~reg
--operation mode is arithmetic
A1L12Q_carry_eqn = A1L71;
A1L12Q_lut_out = A1L12Q $ (A1L12Q_carry_eqn);
A1L12Q = DFFEAS(A1L12Q_lut_out, Clock, Init, , , , , , );
--A1L02 is Count[1]~82
--operation mode is arithmetic
A1L02 = CARRY(!A1L71 # !A1L12Q);
--A1L42Q is Count[2]~reg
--operation mode is arithmetic
A1L42Q_carry_eqn = A1L02;
A1L42Q_lut_out = A1L42Q $ (!A1L42Q_carry_eqn);
A1L42Q = DFFEAS(A1L42Q_lut_out, Clock, Init, , , , , , );
--A1L32 is Count[2]~86
--operation mode is arithmetic
A1L32 = CARRY(A1L42Q & (!A1L02));
--A1L72Q is Count[3]~reg
--operation mode is arithmetic
A1L72Q_carry_eqn = A1L32;
A1L72Q_lut_out = A1L72Q $ (A1L72Q_carry_eqn);
A1L72Q = DFFEAS(A1L72Q_lut_out, Clock, Init, , , , , , );
--A1L62 is Count[3]~90
--operation mode is arithmetic
A1L62 = CARRY(!A1L32 # !A1L72Q);
--A1L03Q is Count[4]~reg
--operation mode is arithmetic
A1L03Q_carry_eqn = A1L62;
A1L03Q_lut_out = A1L03Q $ (!A1L03Q_carry_eqn);
A1L03Q = DFFEAS(A1L03Q_lut_out, Clock, Init, , , , , , );
--A1L92 is Count[4]~94
--operation mode is arithmetic
A1L92 = CARRY(A1L03Q & (!A1L62));
--A1L33Q is Count[5]~reg
--operation mode is arithmetic
A1L33Q_carry_eqn = A1L92;
A1L33Q_lut_out = A1L33Q $ (A1L33Q_carry_eqn);
A1L33Q = DFFEAS(A1L33Q_lut_out, Clock, Init, , , , , , );
--A1L23 is Count[5]~98
--operation mode is arithmetic
A1L23 = CARRY(!A1L92 # !A1L33Q);
--A1L63Q is Count[6]~reg
--operation mode is arithmetic
A1L63Q_carry_eqn = A1L23;
A1L63Q_lut_out = A1L63Q $ (!A1L63Q_carry_eqn);
A1L63Q = DFFEAS(A1L63Q_lut_out, Clock, Init, , , , , , );
--A1L53 is Count[6]~102
--operation mode is arithmetic
A1L53 = CARRY(A1L63Q & (!A1L23));
--A1L93Q is Count[7]~reg
--operation mode is arithmetic
A1L93Q_carry_eqn = A1L53;
A1L93Q_lut_out = A1L93Q $ (A1L93Q_carry_eqn);
A1L93Q = DFFEAS(A1L93Q_lut_out, Clock, Init, , , , , , );
--A1L83 is Count[7]~106
--operation mode is arithmetic
A1L83 = CARRY(!A1L53 # !A1L93Q);
--A1L24Q is Count[8]~reg
--operation mode is arithmetic
A1L24Q_carry_eqn = A1L83;
A1L24Q_lut_out = A1L24Q $ (!A1L24Q_carry_eqn);
A1L24Q = DFFEAS(A1L24Q_lut_out, Clock, Init, , , , , , );
--A1L14 is Count[8]~110
--operation mode is arithmetic
A1L14 = CARRY(A1L24Q & (!A1L83));
--A1L54Q is Count[9]~reg
--operation mode is arithmetic
A1L54Q_carry_eqn = A1L14;
A1L54Q_lut_out = A1L54Q $ (A1L54Q_carry_eqn);
A1L54Q = DFFEAS(A1L54Q_lut_out, Clock, Init, , , , , , );
--A1L44 is Count[9]~114
--operation mode is arithmetic
A1L44 = CARRY(!A1L14 # !A1L54Q);
--A1L74Q is Count[10]~reg
--operation mode is normal
A1L74Q_carry_eqn = A1L44;
A1L74Q_lut_out = A1L74Q $ (!A1L74Q_carry_eqn);
A1L74Q = DFFEAS(A1L74Q_lut_out, Clock, Init, , , , , , );
--A1L25Q is Exactarray[0]~reg
--operation mode is normal
A1L25Q_lut_out = A1L25Q & (!A1L15) # !A1L25Q & A1L46Q & Ao_seven;
A1L25Q = DFFEAS(A1L25Q_lut_out, Clock, VCC, , , , , , );
--A1L45Q is Exactarray[1]~reg
--operation mode is normal
A1L45Q_lut_out = A1L45Q & (!A1L15 # !A1L25Q) # !A1L45Q & A1L05 & A1L25Q;
A1L45Q = DFFEAS(A1L45Q_lut_out, Clock, VCC, , , , , , );
--A1L85Q is Exactarray[2]~reg
--operation mode is normal
A1L85Q_lut_out = A1L85Q & (!A1L75) # !A1L85Q & A1L65;
A1L85Q = DFFEAS(A1L85Q_lut_out, Clock, VCC, , , , , , );
--A1L06Q is Exactarray[3]~reg
--operation mode is normal
A1L06Q_lut_out = A1L06Q & (!A1L75 # !A1L85Q) # !A1L06Q & A1L65 & A1L85Q;
A1L06Q = DFFEAS(A1L06Q_lut_out, Clock, VCC, , , , , , );
--A1L1 is _~484
--operation mode is normal
A1L1 = A1L46Q & !A1L66Q & !A1L86Q & !A1L07Q;
--A1L2 is _~485
--operation mode is normal
A1L2 = !A1L27Q & !A1L47Q & !A1L67Q & !A1L87Q;
--A1L3 is _~486
--operation mode is normal
A1L3 = A1L2 & !A1L08Q & !A1L28Q & !A1L48Q;
--Ao_seven is Ao_seven
--operation mode is normal
Ao_seven_lut_out = Az_six & (!A1L46Q);
Ao_seven = DFFEAS(Ao_seven_lut_out, Clock, VCC, , , , , , );
--A1L05 is Exactarray[0]~461
--operation mode is normal
A1L05 = A1L46Q & Ao_seven;
--A_zero is A_zero
--operation mode is normal
A_zero_lut_out = A1L46Q & (Ao_five # !A1L4) # !A1L5;
A_zero = DFFEAS(A_zero_lut_out, Clock, VCC, , , , , , );
--Az_one is Az_one
--operation mode is normal
Az_one_lut_out = !A_zero & (A1L46Q);
Az_one = DFFEAS(Az_one_lut_out, Clock, VCC, , , , , , );
--Az_two is Az_two
--operation mode is normal
Az_two_lut_out = A1L46Q & (Az_one # Az_six);
Az_two = DFFEAS(Az_two_lut_out, Clock, VCC, , , , , , );
--Az_three is Az_three
--operation mode is normal
Az_three_lut_out = A1L46Q & Az_two;
Az_three = DFFEAS(Az_three_lut_out, Clock, VCC, , , , , , );
--A1L4 is _~487
--operation mode is normal
A1L4 = A_zero & !Az_one & !Az_two & !Az_three;
--Az_four is Az_four
--operation mode is normal
Az_four_lut_out = A1L46Q & (Az_three # Az_four);
Az_four = DFFEAS(Az_four_lut_out, Clock, VCC, , , , , , );
--Az_six is Az_six
--operation mode is normal
Az_six_lut_out = A1L46Q & Ao_five;
Az_six = DFFEAS(Az_six_lut_out, Clock, VCC, , , , , , );
--A1L5 is _~488
--operation mode is normal
A1L5 = !Az_four & !Az_six;
--Ao_five is Ao_five
--operation mode is normal
Ao_five_lut_out = Az_four & (!A1L46Q);
Ao_five = DFFEAS(Ao_five_lut_out, Clock, VCC, , , , , , );
--A1L15 is Exactarray[0]~462
--operation mode is normal
A1L15 = A1L05 & A1L4 & A1L5 & !Ao_five;
--A1L65 is Exactarray[2]~464
--operation mode is normal
A1L65 = A1L46Q & A1L25Q & A1L45Q & Ao_seven;
--A1L75 is Exactarray[2]~465
--operation mode is normal
A1L75 = A1L25Q & A1L45Q & A1L15;
--Clock is Clock
--operation mode is input
Clock = INPUT();
--Init is Init
--operation mode is input
Init = INPUT();
--Poly[0] is Poly[0]
--operation mode is output
Poly[0] = OUTPUT(!A1L46Q);
--Poly[1] is Poly[1]
--operation mode is output
Poly[1] = OUTPUT(A1L66Q);
--Poly[2] is Poly[2]
--operation mode is output
Poly[2] = OUTPUT(A1L86Q);
--Poly[3] is Poly[3]
--operation mode is output
Poly[3] = OUTPUT(A1L07Q);
--Poly[4] is Poly[4]
--operation mode is output
Poly[4] = OUTPUT(A1L27Q);
--Poly[5] is Poly[5]
--operation mode is output
Poly[5] = OUTPUT(A1L47Q);
--Poly[6] is Poly[6]
--operation mode is output
Poly[6] = OUTPUT(A1L67Q);
--Poly[7] is Poly[7]
--operation mode is output
Poly[7] = OUTPUT(A1L87Q);
--Poly[8] is Poly[8]
--operation mode is output
Poly[8] = OUTPUT(A1L08Q);
--Poly[9] is Poly[9]
--operation mode is output
Poly[9] = OUTPUT(A1L28Q);
--Poly[10] is Poly[10]
--operation mode is output
Poly[10] = OUTPUT(A1L48Q);
--Count[0] is Count[0]
--operation mode is output
Count[0] = OUTPUT(A1L81Q);
--Count[1] is Count[1]
--operation mode is output
Count[1] = OUTPUT(A1L12Q);
--Count[2] is Count[2]
--operation mode is output
Count[2] = OUTPUT(A1L42Q);
--Count[3] is Count[3]
--operation mode is output
Count[3] = OUTPUT(A1L72Q);
--Count[4] is Count[4]
--operation mode is output
Count[4] = OUTPUT(A1L03Q);
--Count[5] is Count[5]
--operation mode is output
Count[5] = OUTPUT(A1L33Q);
--Count[6] is Count[6]
--operation mode is output
Count[6] = OUTPUT(A1L63Q);
--Count[7] is Count[7]
--operation mode is output
Count[7] = OUTPUT(A1L93Q);
--Count[8] is Count[8]
--operation mode is output
Count[8] = OUTPUT(A1L24Q);
--Count[9] is Count[9]
--operation mode is output
Count[9] = OUTPUT(A1L54Q);
--Count[10] is Count[10]
--operation mode is output
Count[10] = OUTPUT(A1L74Q);
--Exactarray[0] is Exactarray[0]
--operation mode is output
Exactarray[0] = OUTPUT(A1L25Q);
--Exactarray[1] is Exactarray[1]
--operation mode is output
Exactarray[1] = OUTPUT(A1L45Q);
--Exactarray[2] is Exactarray[2]
--operation mode is output
Exactarray[2] = OUTPUT(A1L85Q);
--Exactarray[3] is Exactarray[3]
--operation mode is output
Exactarray[3] = OUTPUT(A1L06Q);
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