📄 iis_vhdl.map.qmsg
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{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" { } { } 3 0 "*******************************************************************" 0 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis Quartus II " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 6.0 Build 178 04/27/2006 SJ Full Version " "Info: Version 6.0 Build 178 04/27/2006 SJ Full Version" { } { } 0 0 "%1!s!" 0 0} { "Info" "IQEXE_START_BANNER_TIME" "Fri Mar 30 16:09:36 2007 " "Info: Processing started: Fri Mar 30 16:09:36 2007" { } { } 0 0 "Processing started: %1!s!" 0 0} } { } 4 0 "Running %2!s! %1!s!" 0 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --read_settings_files=on --write_settings_files=off IIS_VHDL -c IIS_VHDL " "Info: Command: quartus_map --read_settings_files=on --write_settings_files=off IIS_VHDL -c IIS_VHDL" { } { } 0 0 "Command: %1!s!" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "IIS_VHDL.vhd 2 1 " "Info: Found 2 design units, including 1 entities, in source file IIS_VHDL.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 IIS_VHDL-RTL " "Info: Found design unit 1: IIS_VHDL-RTL" { } { { "IIS_VHDL.vhd" "" { Text "D:/PROJECT/arm9_develop/Programs/IIS_VHDL/IIS_VHDL.vhd" 19 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 IIS_VHDL " "Info: Found entity 1: IIS_VHDL" { } { { "IIS_VHDL.vhd" "" { Text "D:/PROJECT/arm9_develop/Programs/IIS_VHDL/IIS_VHDL.vhd" 7 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_START_ELABORATION_TOP" "IIS_VHDL " "Info: Elaborating entity \"IIS_VHDL\" for the top level hierarchy" { } { } 0 0 "Elaborating entity \"%1!s!\" for the top level hierarchy" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd 3 1 " "Info: Found 3 design units, including 1 entities, in source file c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_signaltap_pack " "Info: Found design unit 1: sld_signaltap_pack" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" 62 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_signaltap-rtl " "Info: Found design unit 2: sld_signaltap-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" 175 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_signaltap " "Info: Found entity 1: sld_signaltap" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" 85 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_ELABORATION_HEADER" "sld_signaltap:IIS_VHDL " "Info: Elaborated megafunction instantiation \"sld_signaltap:IIS_VHDL\"" { } { } 0 0 "Elaborated megafunction instantiation \"%1!s!\"" 0 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd 14 7 " "Info: Found 14 design units, including 7 entities, in source file c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 sld_ela_control-rtl " "Info: Found design unit 1: sld_ela_control-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 125 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 sld_ela_level_seq_mgr-rtl " "Info: Found design unit 2: sld_ela_level_seq_mgr-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 906 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "3 sld_ela_state_machine-rtl " "Info: Found design unit 3: sld_ela_state_machine-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1084 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "4 sld_ela_seg_state_machine-rtl " "Info: Found design unit 4: sld_ela_seg_state_machine-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1190 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "5 sld_ela_post_trigger_counter-rtl " "Info: Found design unit 5: sld_ela_post_trigger_counter-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1305 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "6 sld_ela_segment_mgr-rtl " "Info: Found design unit 6: sld_ela_segment_mgr-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1434 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "7 sld_ela_basic_multi_level_trigger-rtl " "Info: Found design unit 7: sld_ela_basic_multi_level_trigger-rtl" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1617 -1 0 } } } 0 0 "Found design unit %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "1 sld_ela_control " "Info: Found entity 1: sld_ela_control" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 68 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "2 sld_ela_level_seq_mgr " "Info: Found entity 2: sld_ela_level_seq_mgr" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 877 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "3 sld_ela_state_machine " "Info: Found entity 3: sld_ela_state_machine" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1062 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "4 sld_ela_seg_state_machine " "Info: Found entity 4: sld_ela_seg_state_machine" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1168 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "5 sld_ela_post_trigger_counter " "Info: Found entity 5: sld_ela_post_trigger_counter" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1285 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "6 sld_ela_segment_mgr " "Info: Found entity 6: sld_ela_segment_mgr" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1410 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} { "Info" "ISGN_ENTITY_NAME" "7 sld_ela_basic_multi_level_trigger " "Info: Found entity 7: sld_ela_basic_multi_level_trigger" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_ela_control.vhd" 1580 -1 0 } } } 0 0 "Found entity %1!d!: %2!s!" 0 0} } { } 0 0 "Found %2!d! design units, including %3!d! entities, in source file %1!s!" 0 0}
{ "Info" "ISGN_MEGAFN_DESCENDANT" "sld_signaltap:IIS_VHDL\|sld_ela_control:ela_control sld_signaltap:IIS_VHDL " "Info: Elaborated megafunction instantiation \"sld_signaltap:IIS_VHDL\|sld_ela_control:ela_control\", which is child of megafunction instantiation \"sld_signaltap:IIS_VHDL\"" { } { { "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" "" { Text "c:/altera/quartus60/libraries/megafunctions/sld_signaltap.vhd" 660 -1 0 } } } 0 0 "Elaborated megafunction instantiation \"%1!s!\", which is child of megafunction instantiation \"%2!s!\"" 0 0}
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