gate_test_vhd_tb.fdo

来自「本代码介绍了使用VHDL开发FPGA的一般流程」· FDO 代码 · 共 14 行

## NOTE:  Do not edit this file.
## Autogenerated by ProjNav (creatfdo.tcl) on Mon Dec 18 22:41:55 中国标准时间 2006
##
vlib work
vcom -93 -explicit  gate.vhdl
vcom -93 -explicit  gate_teat.vhd
vsim -t 1ps   -lib work gate_test_vhd_tb
do gate_test_vhd_tb.udo
view wave
add wave *
view structure
view signals
run 1000ns